MC34115P 데이터 시트보기 (PDF) - Motorola => Freescale
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MC34115P Datasheet PDF : 16 Pages
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MC34115
Figure 15. 16 kHz Simplex Voice Codec
(Using MC34115, Single–Pole Companding and Single Integration)
Push
To Talk
Key
5.0
(Norm
Open)
10 k
Analog
Input
+
4.0 µF
Encode/Decode 15
1
Comp
–
2
+
Digital Input
Digital Output
Clock 16 kHz
5.0
Digital
Out 9 Clock 14 VCC 16
13
–
600
600 12
+
Vth
Shift
Register
0.1 1.0 k 10 k
Analog
Output
10
5
Ref
Input
7
Analog
Out
VCC/2
Ref
+
–
Logic
Slope Polarity
Switch
Coin
Out
11
Syl RS
In
3
GC
4
3.3 k RP
18 k CS
0.33
2.4 M Rmin
1.3 k Rx
C1 0.1
Filter 6
Ref
VEE 8
R1 10 k
VS
APPLICATIONS INFORMATION
CVSD DESIGN CONSIDERATIONS
A simple CVSD encoder using the MC34115 is shown in
Figure 15. This IC is a general purpose CVSD building block
which allows the system designer to tailor the encoder’s
transmission characteristics to the application. Thus, the
achievable transmission capabilities are constrained by the
fundamental limitations of delta modulation and the design of
encoder parameters. The performance is not dictated by the
internal configuration of the MC34115. There are six design
considerations involved in designing these basic CVSD
building blocks into a specific codec application.
These are listed below:
1. Selection of clock rate
2. Selection of loop gain
3. Selection of minimum step size
4. Design of integration filter transfer function
5. Design of syllabic filter transfer function
6. Design of low pass filter at the receiver
The circuit in Figure 15 is the most basic CVSD circuit
possible. For many applications in secure radio or other
intelligible voice channel requirements, it is entirely sufficient.
In this circuit, items 4 and 5 are reduced to their simplest
form. The syllabic and integration filters are both single–pole
networks. The selection of items 1 through 3 govern the
codec performance.
Layout Considerations
Care should be exercised to isolate all digital signal paths
(Pins 9, 11, 13 and 14) from analog signal paths (Pins 1 to 7
and 10) in order to achieve proper idle channel performance.
Clock Rate
With minor modifications, the circuit in Figure 15 may be
operated anywhere from 9.6 to 64 kHz clock rates. Obviously
the higher the clock rate the higher the S/N performance. The
circuit in Figure 15 typically produces the S/N performance
shown in Figure 16. The selection of clock rate is usually
dictated by the bandwidth of the transmission medium. Voice
bandwidth systems will require no higher than 9600 Hz.
Some radio systems will allow 12 kHz. Private 4–wire
telephone systems are often operated at 16 kHz and
commercial telephone performance can be achieved at
32 k bits and above.
MOTOROLA ANALOG IC DEVICE DATA
11
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