MC68302RC16 데이터 시트보기 (PDF) - Motorola => Freescale

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MC68302RC16

Integrated Multiprotocol Processor User’s Manual

Motorola => Freescale 

Table of Contents

Figure

Number

Title

Page

Number

Figure 4-5.

Figure 4-6.

Figure 4-7.

Figure 4-8.

Figure 4-9.

Figure 4-10.

Figure 4-11.

Figure 4-12.

Figure 4-13.

Figure 4-14.

Figure 4-15.

Figure 4-16.

Figure 4-17.

Figure 4-18.

Figure 4-19.

Figure 4-20.

Figure 4-21.

Figure 4-22.

Figure 4-23.

Figure 4-24.

Figure 4-25.

Figure 4-26.

Figure 4-27.

Figure 4-28.

Figure 4-29.

Figure 4-30.

Figure 4-31.

Figure 4-32.

Figure 4-33.

Figure 4-34.

Figure 4-35.

Figure 4-36.

Figure 4-37.

Figure 4-38.

Figure 4-39.

Figure 4-40.

Figure 4-41.

Figure 4-42.

Figure 4-43.

Figure 4-44.

Figure 4-45.

Serial Channels Physical Interface Block Diagram .................................. 4-10

IDL Bus Signals ....................................................................................... 4-11

IDL Terminal Adaptor ............................................................................... 4-12

GCI Bus Signals....................................................................................... 4-15

Two PCM Sync Methods.......................................................................... 4-18

PCM Channel Assignment on a T1/CEPT Line ....................................... 4-19

SCC Block Diagram ................................................................................. 4-24

SCC Baud Rate Generator ...................................................................... 4-26

Output Delays from RTS Low, Synchronous Protocol ............................. 4-29

Output Delays from CTS Low, Synchronous Protocol ............................. 4-29

Memory Structure..................................................................................... 4-32

SCC Buffer Descriptor Format ................................................................. 4-33

UART Frame Format................................................................................ 4-43

Two Configurations of UART Multidrop Operation................................... 4-50

UART Control Characters Table .............................................................. 4-51

UART Receive Buffer Descriptor ............................................................. 4-58

UART Rx BD Example ............................................................................. 4-59

UART Transmit Buffer Descriptor ............................................................ 4-61

UART Interrupt Events Example .............................................................. 4-64

Typical HDLC Frame................................................................................ 4-66

HDLC Address Recognition Examples .................................................... 4-71

HDLC Receive Buffer Descriptor ............................................................. 4-75

HDLC Receive BD Example .................................................................... 4-76

HDLC Transmit Buffer Descriptor ............................................................ 4-78

HDLC Interrupt Events Example .............................................................. 4-81

Typical BISYNC Frames .......................................................................... 4-83

BISYNC Control Characters Table........................................................... 4-88

BISYNC Receive Buffer Descriptor.......................................................... 4-93

BISYNC Transmit Buffer Descriptor......................................................... 4-95

Typical DDCMP Frames ........................................................................ 4-100

DDCMP Transmission/Reception Summary .......................................... 4-102

DDCMP Receive Buffer Descriptor ........................................................ 4-109

DDCMP Transmit Buffer Descriptor ....................................................... 4-112

Two-Step Synchronous Bit Rate Adaption............................................. 4-116

Three-Step Asynchronous Bit Rate Adaption ........................................ 4-117

V.110 Receive Buffer Descriptor............................................................ 4-119

V.110 Transmit Buffer Descriptor........................................................... 4-120

Transparent Receive Buffer Descriptor.................................................. 4-130

Transparent Transmit Buffer Descriptor................................................. 4-131

SCP Timing ............................................................................................ 4-135

SCP vs. SCC Pin Multiplexing ............................................................... 4-137

Figure 5-1.

Section 5

Signal Description

Functional Signal Groups........................................................................... 5-3

xviii

MC68302 USER’S MANUAL

MOTOROLA

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