MC145505P 데이터 시트보기 (PDF) - LANSDALE Semiconductor Inc.
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MC145505P Datasheet PDF : 26 Pages
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ML145502, ML145503, ML145505
LANSDALE Semiconductor, Inc.
RDD
Receive Digital Data Input
RDD is the receive digital data input. The timing for this pin is
controlled by RDC and RCE. The data format is determined by the
Mu/A pin.
Mu/A
Select
This pin selects the companding law and the data format at TDD
and RDD.
Mu/A = VDD; Mu–255 Companding D3 Data Format with Zero
Code Suppress
Mu/A = VAG; Mu–255 Companding with Sign Magnitude
Data Format
Mu/A = VSS; A–Law Companding with CCITT Data Format
Bit Inversions
Code
Sign/
Magnitude
Mu–Law
A–Law
(CCITT)
+ Full Scale
+ Zero
– Zero
– Full Scale
1111
1000
0000
0111
1111
0000
0000
1111
1000
1111
0111
0000
0000
1111
1111
0010
1010
1101
0101
0010
1010
0101
0101
1010
SIGN
BIT
CHORD BITS
STEP BITS
0
1
2
3
4
5
67
NOTE: Starting from sign magnitude, to change format:
To Mu–Law —
MSB is unchanged (sign)
Invert remaining seven bits
If code is 0000 0000, change to 0000 0010 (for zero
code suppression)
To A–Law —
MSB is unchanged (sign)
Invert odd numbered bits
Ignore zero code suppression
PDI
Power Down Input
The power down input disables the bias circuitry and gates off all
clock inputs. This puts the VAG, Txl, RxO, RxO, and TDD outputs
into a high–impedance state. The power dissipation is reduced to 0.1
mW when PDI is a low logic level. The circuit operates normally
with PDI = VDD or with a logic high as defined by connection at
VLS. TDD will not come out of high impedance for two MSI cycles
after PDI goes high.
DCLK
Data Clock Input
In the ML145505, TDC and RDC are internally connected to
DCLK.
ANALOG
VAG
Analog Ground input/Output Pin
VAG is the analog ground power supply input/output. All analog
signals into and out of the device use this as their ground reference.
Each version of the ML1455xx PCM Codec–Filter family can pro-
vide its own analog ground supply internally. The DC voltage of this
internal supply is 6% positive of the midway between VDD and
VSS. This supply can sink more than 8 mA but has a current source
limited to 400 µA.The output of this supply is internally connected
to the analog ground input of the part. The node where this supply
and the analog ground are connected is brought out to the VAG pin.
In symmetric dual supply systems (±5, ±6, etc.), VAG may be exter-
nally tied to the system analog ground supply. When RxO or RxO
drive low impedance loads tied to VAG, a pull–up resistor to VDD
will be required to boost the source current capability if VAG is not
tied to the supply ground. All analog signals for the part are refer-
enced to VAG, including noise; therefore, decoupling capacitors (0.1
µF) should be used from VDD to VAG and VSS to VAG.
Vref
Positive Voltage Reference Input (ML145502 Only)
The Vref pin allows an external reference voltage to be used for
the A/D and D/A conversions. If Vref is tied to VSS, the internal ref-
erence is selected. If Vref > VAG, then the external mode is selected
and the voltage applied to Vref is used for generating the internal
converter reference voltage. In either internal or external reference
mode, the actual voltage used for conversion is multiplied by the
ratio selected by the RSI pin. The RSI pin circuitry is explained
under its pin description below. Both the internal and external refer-
ences are inverted within the PCM Codec–Filter for negative input
voltages such that only one reference is required.
External Mode — In the external reference mode (Vref >VAG),
a 2.5 V reference like the MC1403 may be connected from Vref to
VAG. A single external reference may be shared by tying together a
number of Vref pins and VAG pins from different codec–filters. In
special applications, the external reference voltage may be between
0.5 and 5 V. However, the reference voltage gain selection circuitry
associated with RSI must be considered to arrive at the desired
codec–filter gain.
Internal Mode — In the internal reference mode (Vref =VSS),
an internal 2.5 V reference supplies the reference voltage for the RSI
circuitry. The Vref pin is functionally connected to VSS for the
ML145503,and ML145505 pinouts.
RSI
Reference Select Input (ML145502 Only)
The RSI input allows the selection of three different overload or
full–scale A/D and D/A converter reference voltages independent of
the internal or external reference mode. The RSI pin is a digital
input that senses three different logic states: VSS, VAG, and VDD.
For RSI = VAG, the reference voltage is used directly for the con-
verters. The internal reference is 2.5 V. For RSI = VSS, the reference
voltage is multiplied by the ratio of 1.26, which results in an internal
converter reference of 3.15 V. For RSI = VDD, the reference voltage
is multiplied by 1.51, which results in an internal converter reference
of 3.78 V. The device requires a minimum of 1.0 V of headroom
between the internal converter reference to VDD. VSS has this same
absolute valued minimum, also measured from VAG pin. The vari-
ous modes of operation are summarized in Table 2. The RSI pin is
functionally connected to VSS for the ML145503, and ML145505
pinouts.
Page 10 of 26
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