MX29LV800B 데이터 시트보기 (PDF) - Macronix International

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MX29LV800B

8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY

Macronix International 

MX29LV800T/B

Q3

Sector Erase Timer

After the completion of the initial sector erase command

sequence, the sector erase time-out will begin. Q3 will

remain low until the time-out is complete. Data Polling

and Toggle Bit are valid after the initial sector erase com-

mand sequence.

If Data Polling or the Toggle Bit indicates the device has

been written with a valid erase command, Q3 may be

used to determine if the sector erase timer window is

still open. If Q3 is high ("1") the internally controlled

erase cycle has begun; attempts to write subsequent

commands to the device will be ignored until the erase

operation is completed as indicated by Data Polling or

Toggle Bit. If Q3 is low ("0"), the device will accept

additional sector erase commands. To insure the com-

mand has been accepted, the system software should

check the status of Q3 prior to and following each sub-

sequent sector erase command. If Q3 were high on the

second status check, the command may not have been

accepted.

DATA PROTECTION

The MX29LV800T/B is designed to offer protection

against accidental erasure or programming caused by

spurious system level signals that may exist during power

transition. During power up the device automatically re-

sets the state machine in the Read mode. In addition,

with its control register architecture, alteration of the

memory contents only occurs after successful comple-

tion of specific command sequences. The device also

incorporates several features to prevent inadvertent write

cycles resulting from VCC power-up and power-down tran-

sition or system noise.

WRITE PULSE "GLITCH" PROTECTION

Noise pulses of less than 5ns(typical) on CE or WE will

not initiate a write cycle.

LOGICAL INHIBIT

Writing is inhibited by holding any one of OE = VIL, CE

= VIH or WE = VIH. To initiate a write cycle CE and WE

must be a logical zero while OE is a logical one.

POWER SUPPLY DECOUPLING

In order to reduce power switching effect, each device

should have a 0.1uF ceramic capacitor connected be-

tween its VCC and GND.

POWER-UP SEQUENCE

The MX29LV800T/B powers up in the Read only mode.

In addition, the memory contents may only be altered

after successful completion of the predefined command

sequences.

TEMPORARY SECTOR UNPROTECT

This feature allows temporary unprotection of previously

protected sector to change data in-system. The Tempo-

rary Sector Unprotect mode is activated by setting the

RESET pin to VID(11.5V-12.5V). During this mode, for-

merly protected sectors can be programmed or erased

as un-protected sector. Once VID is remove from the

RESET pin,all the previously protected sectors are pro-

tected again.

SECTOR PROTECTION

The MX29LV800T/B features hardware sector protec-

tion. This feature will disable both program and erase

operations for these sectors protected. To activate this

mode, the programming equipment must force VID on

address pin A9 and OE (suggest VID = 12V). Program-

ming of the protection circuitry begins on the falling edge

of the WE pulse and is terminated on the rising edge.

Please refer to sector protect algorithm and waveform.

To verify programming of the protection circuitry, the pro-

gramming equipment must force VID on address pin A9

( with CE and OE at VIL and WE at VIH). When A1=VIH,

A0=VIL, A6=VIL, it will produce a logical "1" code at

device output Q0 for a protected sector. Otherwise the

device will produce 00H for the unprotected sector. In

this mode, the addresses,except for A1, are don't care.

Address locations with A1 = VIL are reserved to read

manufacturer and device codes.(Read Silicon ID)

It is also possible to determine if the sector is protected

in the system by writing a Read Silicon ID command.

Performing a read operation with A1=VIH, it will produce

a logical "1" at Q0 for the protected sector.

P/N:PM0709

REV. 1.3, JAN. 24, 2002

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