RF3320 데이터 시트보기 (PDF) - RF Micro Devices

부품명

상세내역

제조사

RF3320

CABLE REVERSE PATH PROGRAMMABLE GAIN AMPLIFIER

RF Micro Devices 

Preliminary

Shutdown Enable

Shutdown enable can be set to be “continuous on”

(chip enabled) by placing the SHDN jumper in the up

position and placing the associated GND/VCC jumper

in the “VCC” position. Shutdown enable can be set to

“continuous off” (chip disabled) by placing the associ-

ated GND/VCC jumper in the “GND” position. If a com-

puter controlled signal is used (J1), place the SHDN

jumper in the down position.

VCC

GND

VCC

GND

VCC

GND

SHDN

SHDN

SHDN

Continuous OFF

A

Continuous ON

B

Software Controlled

C

Figure 2. SHDN Enable Configuration

VCC Settings

VCC1 should be set to 5.0VDC.

Evaluation Board Setup

Equipment Needed

• Signal Generator

• Spectrum Analyzer

• Power Supply (5.0V@300mA)

• RF3320 PCBA

• Serial Cable (included with kit)

• Standard PC

• Three-Wire Bus Software

Optional Equipment

• Variable Low-Pass or Band-Pass Filters

• Power Meter

• Second Signal Generator with Modulation for ACPR

and IP2, IP3 Testing

• Arbitrary Wave Generator

• Two-Channel Oscilloscope

Software Setup

To install the software, you need a computer with the

following.

• 133MHz Pentium processor

• 16MB RAM

• Hard Drive with 5MB free space

• Free 25-pin LPT port

• VGA Monitor

The software may be downloaded from www.rfmd.com

by following these steps.

Select the “Product Support” tab;

Select “Evaluation Board Information”;

Select “RF3320”.

Rev A10 010514

RF3320

Unzip the file using WinZip 7.0 or higher (http://

www.winzip.com). Unzip to a temporary directory and

run RF3320.exe.

The 7-bit Gain Control Word (GCW) in the data latch

determines the gain setting in the RF3320. The gain

control data (SDA) load sequence is initiated by a fall-

ing edge on CS. The SDA is serially loaded (LSB first)

into the 7-bit shift register at each rising edge of the

clock. While CS is low, the data latch holds the previ-

ous data word allowing the gain level to remain

3

unchanged. After seven clock cycles the new data

word is fully loaded and CS is switched high. This

enables the data latch and the loaded register data is

passed to the gain control block with the updated gain

value. Also at this CS transition, the internal clock is

disabled, thus inhibiting new serial input data.

Software and Cable

Figure 3 shows the cable configuration. Connect the

cable into the LPT1 port of the computer running the

software. Connect the other end of the cable to the 25-

pin connector of the evaluation board. Executing the

software (RF3320.exe) will produce the screen shown

in Figure 4. The user may set the gain of the evaluation

board by sliding the gain control switch to the desired

gain setting. Pressing the Preset Gain Value buttons

automatically sets the gain of the unit to the value

shown on the button. The Automatic Gain Adjustment

when set to “Cycle” will automatically cycle through all

of the gain steps (0-58) in seconds (at the rate set by

the user). The user may place the unit in sleep, shut-

down and transmit enable/disable modes by checking

the corresponding box. The bit pattern being sent to

the PCBA is shown at the bottom of the screen. See

README_3320.txt file for proper pin/signal mapping

for the 25 pin interface.

3-41

Share Link: