Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits
English
한국어
日本語
русский
简体中文
español
부품명
상세내역
CX28HC64DMB-12(2006) 데이터 시트보기 (PDF) - Intersil
부품명
상세내역
제조사
CX28HC64DMB-12
(Rev.:2006)
5 Volt, Byte Alterable EEPROM
Intersil
CX28HC64DMB-12 Datasheet PDF : 17 Pages
First
Prev
11
12
13
14
15
16
17
WRITE CYCLE LIMITS
Symbol
t
WC(5)
t
AS
t
AH
t
CS
t
CH
t
CW
t
OES
t
OEH
t
WP
t
WPH(6)
t
DV(6)
t
DS
t
DH
t
DW(6)
t
BLC
Parameter
Write cycle time
Address setup time
Address hold time
Write setup time
Write hold time
CE pulse width
OE High setup time
OE High hold time
WE pulse width
WE HIGH recovery
Data valid
Data setup
Data hold
Delay to next write
Byte load cycle
WE Controlled Write Cycle
Address
CE
t
AS
t
AH
t
CS
X28HC64
Min.
0
50
0
0
50
0
0
50
50
50
0
10
0.15
t
WC
t
CH
Typ.
(1)
2
Max.
5
1
100
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
µs
µs
OE
WE
Data In
Data Out
t
OES
t
DV
t
OEH
t
WP
Data Valid
t
DS
t
DH
HIGH Z
Notes: (5) t
WC
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time
the device requires to automatically complete the internal write operation.
(6) t
WPH
and t
DW
are periodically sampled and not 100% tested.
15
FN8109.1
June 7, 2006
Share Link:
datasheetq.com [
Privacy Policy
]
[
Request Datasheet
] [
Contact Us
]