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X28HC64 데이터 시트보기 (PDF) - Intersil
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X28HC64
5 Volt, Byte Alterable EEPROM
Intersil
X28HC64 Datasheet PDF : 16 Pages
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DATA Polling Timing Diagram
(9)
X28HC64
Address
A
n
A
n
A
n
CE
WE
t
OEH
OE
I/O
7
D
IN
= X
Toggle Bit Timing Diagram
(9)
CE
D
OUT
= X
t
WC
t
OES
t
DW
D
OUT
= X
WE
t
OEH
OE
HIGH Z
I/O*
6
*
*
t
WC
* I/O
6
beginning and ending state will vary, depending upon actual t
WC
.
Note: (9) Polling operations are by definition read cycles and are therefore subject to read cycle timings.
t
OES
t
DW
15
FN8109.0
June 1, 2005
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