LV4904V 데이터 시트보기 (PDF) - ON Semiconductor
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LV4904V Datasheet PDF : 25 Pages
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5. I2C Bus Specifications
LV4904V
5.1 Overview of I2C bus interface
The LV4904V supports the standard I2C bus interface (max. 100 kHz). The device ID of the LV4904V is 11011000
(read) and 11011001 (write). Its I2C bus interface does not function as the master but operates only as a slave.
5.2 I2C bus transfer rules
In the bus-free state where there is no I2C transmission or reception, both the SCL and SDA pins must be high. From
the state in which both pins are high, by holding the SCL pin state to high and setting the SDA to low, communication
is started. This is referred to as the start condition.
H
SCL
H
SDA
Bus Free
Start
Condition
To end I2C transmission or reception, change the SDA pin state from low to high with the SCL still high. This is
referred to as the stop condition.
SCL
SDA
Stop
Condition
H
H
Bus Free
Data transfer is started after the start condition has been transmitted. The data is transferred in 8-bit units from the
master to the LV4904V at the slave, and the LV4904V responds every time 8 bits are received by setting the SDA pin
to low. This is referred to as acknowledge (ACK). The master sets the bus free and waits for ACK.
SCL
SDA
ACK
Data is transsferred in 8-bit unit. The LV4904V returns
ACK each time it has received 8-bit data.
ACK
5.3 Data write
To write data in the LV4904V, the device ID, write address and data are sent in this sequence after the start condition
has been sent, and lastly the stop condition is sent. The read/write flag bit is added to the 7-bit device ID, and the write
mode is established according to setting this bit too low.
LV4904V
start 1 1 0 1 1 0 0 R/W ACK
Device ID=1101100
Write address
LV4904V
ACK
Write Data
LV4904V
ACK stop
No.A1963-16/25
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