LV4904V-MPB-E 데이터 시트보기 (PDF) - ON Semiconductor
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LV4904V-MPB-E Datasheet PDF : 25 Pages
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8. Description of I2C Bus Registers
8.1 Input data settings
LV4904V
Register
Address
D7
DATA
10h
0
D6
D5
MCKFS_I2C [1: 0]
D4
D3
SRATE_I2C [1: 0]
D2
D1
D0
DFORM _I2C [2: 0]
DFORM_I2C is set to match the format of the 3-wire serial input that is to be input.
The setting established according to DFORM_I2C is valid only when the DFORM0, DFORM1, and DFORM2 pins are
low in the combined I2C bus and pin setting mode. With any other pin settings or when the pin setting mode is
established, the settings established according to the pins described in section 2.6 are valid, therefore DFORM_I2C
setting described here is ignored. Table 16.1.1 and Figure 16.1.1 to Figure 16.1.4 show the formats that are set by
DFORM_I2C.
Table 8.1.1 Data format settings (initial setting in bold)
DFORM_I2C
000
001
010
011
100
101
110
Data Format
I2S
Left justified, MSB first
Right justified, LSB first
24 bits, right justified, MSB first
20 bits, right justified, MSB first
18 bits, right justified, MSB first
16 bits, right justified, MSB first
Figure 16.1.1 [DFORM_I2C = 0000] BCK=64 fs, I2S (24 bits)
32fs
32fs
Lch
Rch
23 22 21 20
321 0
23 22 21 20
321 0
23 22 21
Figure 16.1.2 [DFORM _I2C = 0001] BCK=64 fs, left justified, MSB first (24 bits)
32fs
32fs
Lch
Rch
23 22 21 20
321 0
23 22 21 20
321 0
Figure 16.1.3 [DFORM _I2C = 0010] BCK=64 fs, right justified, LSB first (24 bits)
32fs
32fs
Lch
Rch
23 22 21 20
21 22 23
01 23
20 21 22 23
0123
20 21 22 23
Figure 8.1.4 [DFORM_I2C = 011/100/101/110] BCK=64 fs, 24/20/18/16 bits, right justified, MSB first
32fs
32fs
Lch
Rch
210
321 0
24/20/18/16 bit
321 0
24/20/18/16 bit
No.A1963-18/25
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