HT9170D_02 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT9170D_02

DTMF Receiver

Holtek Semiconductor 

HT9170B/HT9170D

Pin Assignment

VP

VN

GS

VRE.

IN H

PW DN

X1

X2

VSS

1

18

2

17

3

16

4

15

5

14

6

13

7

12

8

11

9

10

H T9170B

1 8 D IP -A

VDD

R T /G T

EST

DV

D3

D2

D1

D0

OE

VP

VN

GS

VRE.

IN H

PW DN

X1

X2

VSS

1

18

2

17

3

16

4

15

5

14

6

13

7

12

8

11

9

10

H T9170D

1 8 S O P -A

VDD

R T /G T

EST

DV

D3

D2

D1

D0

OE

Pin Description

Pin Name

VP

VN

GS

VREEF

X1

X2

PWDN

INH

VSS

OE

D0~D3

DV

EST

RT/GT

VDD

I/O

Internal

Connection

Description

I

Operational

Amplifier

Operational amplifier non-inverting input

I

Operational amplifier inverting input

O

Operational amplifier output terminal

O

VREF

Reference voltage output, normally VDD/2

I

The system oscillator consists of an inverter, a bias resistor and the necessary

O

oscillator

load capacitor on chip.

A standard 3.579545MHz crystal connected to X1 and X2 terminals imple-

ments the oscillator function.

I

CMOS IN

Pull-low

Active high. This enables the device to go into power down mode and inhibits

the oscillator. This pin input is internally pulled down.

I

CMOS IN

Pull-low

Logic high. This inhibits the detection of tones representing characters A, B, C

and D. This pin input is internally pulled down.

¾

¾

Negative power supply, ground

I

CMOS IN

Pull-high

D0~D3 output enable, high active

O

CMOS OUT

Tristate

Receiving data output terminals

OE=²H²: Output enable

OE=²L²: High impedance

Data valid output

O CMOS OUT When the chip receives a valid tone (DTMF) signal, the DV goes high; other-

wise it remains low.

O CMOS OUT Early steering output (see Functional Description)

I/O

CMOS IN/OUT

Tone acquisition time and release time can be set through connection with ex-

ternal resistor and capacitor.

¾

¾

Positive power supply, 2.5V~5.5V for normal operation

Rev. 1.10

2

September 24, 2002

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