PCF2104NU 데이터 시트보기 (PDF) - Motorola => Freescale

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PCF2104NU

LCD controller/driver

Motorola => Freescale 

Philips Semiconductors

LCD controller/driver

Product specification

PCF2104x

8.15 Programming of MUX 1 : 32 displays with

PCF2104x

To drive a 2-line by 24 characters MUX 1 : 32 display, use

instruction ‘Function set’ to set M, N to 0, 1 (respectively).

To drive a 4-line by 12 characters MUX 1:32 display, use

instruction ‘Function set’ to set M, N to 1, 1 (respectively).

8.16 Reset function

The PCF2104 automatically initializes (resets) when

power is turned on. The state after reset is given in

Table 2.

Table 2 State after reset

STEP

DESCRIPTION

1 Display clear.

2 Function set:

DL = 1: 8-bit interface

M, N = 0 1-line display

G = 0: not used

3 Display on/off control:

D = 0: display off

C = 0: cursor off;

B = 0: blink off;

4 Entry mode set:

I/D = 1: +1 (increment)

G = 0: not used

5 Default address pointer to DDRAM. The Busy

Flag (BF) indicates the busy state (BF = logic 1)

until initialization ends. The busy state lasts

2 ms. The chip may also be initialized by

software. See Tables 10 and 11.

6 I2C-bus interface reset.

9 INSTRUCTIONS

Only two PCF2104x registers, the instruction register (IR)

and the data register (DR) can be directly controlled by the

microcontroller. Before internal operation, control

information is stored temporarily in these registers to allow

interface to various types of microcontrollers which

operate at different speeds or to allow interfacing to

peripheral control ICs.

The PCF2104x operation is controlled by the instructions

shown in Table 3 together with their execution time.

Details are explained in subsequent sections.

Instructions are of 4 categories, those that:

1. Designate PCF2104x functions such as display

format, data length, etc.

2. Set internal RAM addresses

3. Perform data transfer with internal RAM

4. Others.

In normal use, category 3 instructions are used most

frequently. However, automatic incrementing by 1

(or decrementing by 1) of internal RAM addresses after

each data write lessens the microcontroller program load.

The display shift in particular can be performed

concurrently with display data write, thus enabling the

designer to develop systems in minimum time with

maximum programming efficiency.

During internal operation, no instruction other than the

Busy Flag/address read instruction will be executed.

Because the Busy Flag is set to logic 1 while an instruction

is being executed, it is advisable to ensure that the flag it

is at logic 0 before sending the next instruction or wait for

the maximum instruction execution time, as given in

Table 3. An instruction sent while the Busy Flag is HIGH

will not be executed.

1997 Dec 16

18

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