ST92F250CV2 데이터 시트보기 (PDF) - STMicroelectronics

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ST92F250CV2

8/16-bit single voltage Flash MCU family with RAM, E³ TM (emulated EEPROM), CAN 2.0B and J1850 BLPD

STMicroelectronics 

Description

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Description

ST92F124xx/ST92F150Cxx/ST92F150JDV1/ST92F250CV2

The ST92F124/F150/F250 microcontroller is developed and manufactured by

STMicroelectronics using a proprietary n-well HCMOS process. Its performance derives

from the use of a flexible 256-register programming model for ultra-fast context switching

and real-time event response. The intelligent on-chip peripherals offload the ST9 core from

I/O and data management processing tasks allowing critical application tasks to get the

maximum use of core resources. The new-generation ST9 MCU devices now also support

low power consumption and low voltage operation for power-efficient and low-cost

embedded systems.

ST9+ core

The advanced Core consists of the Central Processing Unit (CPU), the Register File, the

Interrupt and DMA controller, and the Memory Management Unit. The MMU allows a single

linear address space of up to 4 Mbytes.

Four independent buses are controlled by the Core: a 22-bit memory bus, an 8-bit register

data bus, an 8-bit register address bus and a 6-bit interrupt/DMA bus which connects the

interrupt and DMA controllers in the on-chip peripherals with the core.

This multiple bus architecture makes the ST9 family devices highly efficient for accessing on

and off-chip memory and fast exchange of data with the on-chip peripherals.

The general-purpose registers can be used as accumulators, index registers, or address

pointers. Adjacent register pairs make up 16-bit registers for addressing or 16-bit

processing. Although the ST9 has an 8-bit ALU, the chip handles 16-bit operations,

including arithmetic, loads/stores, and memory/register and memory/memory exchanges.

The powerful I/O capabilities demanded by microcontroller applications are fulfilled by the

ST92F150/F124 with 48 (64-pin devices) or 77 (100-pin devices) I/O lines dedicated to

digital Input/Output and with 80 I/O lines by the ST92F250. These lines are grouped into up

to ten 8-bit I/O Ports and can be configured on a bit basis under software control to provide

timing, status signals, an address/data bus for interfacing to the external memory, timer

inputs and outputs, analog inputs, external interrupts and serial or parallel I/O. Two memory

spaces are available to support this wide range of configurations: a combined Program/Data

Memory Space and the internal Register File, which includes the control and status

registers of the on-chip peripherals.

External memory interface

100-pin devices have a 22-bit external address bus allowing them to address up to 4 Mbytes

of external memory.

On-chip peripherals

Two 16-bit Multifunction Timers, each with an 8 bit Prescaler and 12 operating modes, allow

simple use for complex waveform generation and measurement, PWM functions and many

other system timing functions by the usage of the two associated DMA channels for each

timer.

Two Extended Function Timers provide further timing and signal generation capabilities.

A Standard Timer can be used to generate a stable time base independent from the PLL.

An I2C interface (two in the ST92F250 device) provides fast I2C and Access Bus support.

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Doc ID 8848 Rev 7

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