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5962-8863401UC 데이터 시트보기 (PDF) - Intersil

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5962-8863401UC
Intersil
Intersil Intersil
5962-8863401UC Datasheet PDF : 17 Pages
First Prev 11 12 13 14 15 16 17
X28HC256
Dual-In-Line Plastic Packages (PDIP)
INDEX
AREA
N
12 3
E1
N/2
-B-
-A-
D
E
BASE
PLANE
SEATING
PLANE
-C- A2 A
L
CL
D1
D1
A1
eA
B1
e
B
eC
C
0.010 (0.25) M C A B S
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendic-
ular to datum -C- .
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E28.6 (JEDEC MS-011-AB ISSUE B)
28 LEAD DUAL-IN-LINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN
MAX
MIN
MAX NOTES
A
-
0.250
-
6.35
4
A1
0.015
-
0.39
-
4
A2
0.125 0.195 3.18
4.95
-
B
0.014 0.022 0.356 0.558
-
B1
0.030 0.070 0.77
1.77
8
C
0.008 0.015 0.204 0.381
-
D
1.380 1.565 35.1
39.7
5
D1
0.005
-
0.13
-
5
E
0.600 0.625 15.24 15.87
6
E1
0.485 0.580 12.32 14.73
5
e
0.100 BSC
2.54 BSC
-
eA
0.600 BSC
15.24 BSC
6
eB
-
0.700
-
17.78
7
L
0.115 0.200 2.93
5.08
4
N
28
28
9
Rev. 1 12/00
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
17
FN8108.3
September 21, 2011

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