EN80C186EA25 데이터 시트보기 (PDF) - Intel

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EN80C186EA25

16-Bit High-Integration Embedded Processors

Intel 

Intel® 80C186EA Peripheral Architecture

Table 1.

Peripheral Control Block Registers

PCB

Offset

00H

02H

04H

06H

08H

0AH

OCH

0EH

10H

12H

14H

16H

18H

1AH

1CH

1EH

20H

22H

24H

26H

28H

2AH

2CH

2EH

30H

32H

34H

36H

38H

3AH

3CH

3EH

Function

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

End of Interrupt

Poll

Poll Status

Interrupt Mask

Priority Mask

In-Service

Interrupt Request

Interrupt Status

Timer Control

DMA0 Int. Control

DMA0 Int. Control

INT0 Control

INT1 Control

INT2 Control

INT3 Control

PCB

Offset

Function

40H

42H

44H

46H

48H

4AH

4CH

4EH

50H

52H

54H

56H

58H

5AH

5CH

5EH

60H

62H

64H

66H

68H

6AH

6CH

6EH

70H

72H

74H

76H

78H

7AH

7CH

7EH

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Timer 0 Count

Timer 0 Compare A

Timer 0 Compare B

Timer 0 Control

Timer 1 Count

Timer 1 Compare A

Timer 1 Compare B

Timer 1 Control

Timer 2 Count

Timer 2 Compare

Reserved

Timer 2 Control

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

PCB

Offset

80H

82H

84H

86H

88H

8AH

8CH

8EH

90H

92H

94H

96H

98H

9AH

9CH

9EH

A0H

A2H

A4H

A6H

A8H

AAH

ACH

AEH

B0H

B2H

B4H

B6H

B8H

BAH

BCH

BEH

Function

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

UMCS

LMCS

PACS

MMCS

MPCS

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

PCB

Offset

C0H

C2H

C4H

C6H

C8H

CAH

CCH

CEH

D0H

D2H

D4H

D6H

D8H

DAH

DCH

DEH

E0H

E2H

E4H

E6H

E8H

EAH

ECH

EEH

F0H

F2H

F4H

F6H

F8H

FAH

FCH

FEH

Function

DMA0 Src. Lo

DMA0 Src. Hi

DMA0 Dest. Lo

DMA0 Count

DMA0 Control

Reserved

Reserved

DMA1 Src. Lo

DMA1 Src. Hi

DMA1 Dest. Lo

DMA1 Dest. Hi

DMA1 Count

DMA1 Control

Reserved

Reserved

Refresh Base

Refresh Time

Refresh Control

Reserved

Reserved

Reserved

Reserved

Reserved

Power-Save

Power Control

Reserved

Step ID

Reserved

Reserved

Reserved

Relocation

12

Product Name Datasheet

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