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BU9728 데이터 시트보기 (PDF) - ROHM Semiconductor

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BU9728 Datasheet PDF : 24 Pages
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* BU9795AFV
As SEG0, SEG1, SEG2, SEG3, SEG31, SEG32, SEG33, SEG34 are not output, these
address will be dummy address.
Dummy data
DDRAM address
Dummy data
00h 01h 02h 03h 04h 05h 06h 07h ・・・・・・・・ 1Eh 1Fh 20h 21h 22h
0a e i m q u
COM0
1b f j n r v
BIT 2 c
g
k
o
s
x
COM1
COM2
3d h l p t y
COM3
SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7
・・・・・・・・
SEG30 SEG31 SEG32 SEG33 SEG34
As data transfer to DDRAM happens every 4bit data, it will be cancelled if it changes
CSB=”L””H” before 4bits data transfer.
* BU9795AGUW
As SEG0, SEG1, SEG33, SEG34 are not output, these address will be dummy address.
Dummy data
DDRAM address
Dummy data
00h 01h 02h 03h 04h 05h 06h 07h ・・・・・・・・ 1Eh 1Fh 20h 21h 22h
0a e i m q u
COM0
1b f j n r v
BIT 2 c
g
k
o
s
x
COM1
COM2
3d h l p t y
COM3
SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7
・・・・・・・・
SEG30 SEG31 SEG32 SEG33 SEG34
As data transfer to DDRAM happens every 4bit data, it will be cancelled if it changes
CSB=”L””H” before 4bits data transfer.
Reset (initial) condition
Initial condition after execute Software Reset is as follows.
Display is OFF.
DDRAM address is initialized (DDRAM Data is not initialized).
Refer to Command Description about initialize value of register.
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