MAX16935RATEB/V 데이터 시트보기 (PDF) - Maxim Integrated
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MAX16935RATEB/V Datasheet PDF : 17 Pages
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MAX16935/MAX16939
36V, 3.5A, 2.2MHz Step-Down Converters
with 28µA Quiescent Current
OUT
COMP
PGOOD
EN
SUP BIAS
FB
FBSW
FBOK
AON
HVLDO
SWITCH
OVER
EAMP
REF
SOFT
START
PWM
LOGIC
CS
HSD
BIAS
BST
SUPSW
LX
MAX16935
MAX16939
SLOPE
COMP
LSD
OSC
PGND
SYNCOUT
Figure 1. Internal Block Diagram
FSYNC FOSC AGND
Power-Good Output (PGOOD)
The devices feature an open-drain power-good output,
PGOOD. PGOOD asserts when VOUT rises above 95%
of its regulation voltage. PGOOD deasserts when VOUT
drops below 92% of its regulation voltage. Connect
PGOOD to BIAS with a 10kI resistor.
Overvoltage Protection (OVP)
If the output voltage reaches the OVP threshold, the
high-side switch is forced off and the low-side switch
is forced on until negative-current limit is reached. After
negative-current limit is reached, both the high-side and
low-side switches are turned off. The MAX16939 offers a
lower voltage threshold for applications requiring tighter
limits of protection.
The MAX16935C offers overvoltage protection in all
modes of operation and protects the output against
reaching > 110% of the regulated voltage. If MAX16935C
output reaches overvoltage-protection thresholds it turns
on the active pulldown on the output (100Ω, typ) to
prevent the output from rising above 110% of regu-
lated voltage. This does not protect against a hard-short
across the HSFET of the IC.
Synchronization Input (FSYNC)
FSYNC is a logic-level input useful for operating mode
selection and frequency control. Connecting FSYNC to
BIAS or to an external clock enables fixed-frequency
FPWM operation. Connecting FSYNC to AGND enables
skip mode operation.
The external clock frequency at FSYNC can be higher
or lower than the internal clock by 20%. Ensure the duty
cycle of the external clock used has a minimum pulse
width of 100ns. The devices synchronize to the external
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