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H5TQ2G43CFR-XXC 데이터 시트보기 (PDF) - Hynix Semiconductor
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H5TQ2G43CFR-XXC
2Gb DDR3 SDRAM
Hynix Semiconductor
H5TQ2G43CFR-XXC Datasheet PDF : 33 Pages
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DDR3-1866 Speed Bins
For specific Notes See "Speed Bin Table Notes" on page 32.
Speed Bin
CL - nRCD - nRP
Parameter
Symbol
Internal read command
to first data
t
AA
ACT to internal read or
write delay time
t
RCD
PRE command period
t
RP
ACT to PRE command
period
t
RAS
ACT to ACT or PRE
command period
t
RC
CL = 5
CWL = 5
CWL = 6,7,8,9
CWL = 5
CL = 6 CWL = 6
CWL = 7,8,9
CWL = 5
CL = 7 CWL = 6
CWL = 7,8,9
CWL = 5
CL = 8
CWL = 6
CWL = 7
CWL = 8,9
CWL = 5, 6
CL = 9
CWL = 7
CWL = 8
CWL = 9
CWL = 5, 6
CL = 10 CWL = 7
CWL = 8
CWL = 5,6,7
CL = 11 CWL = 8
CWL = 9
CL = 12
CWL = 5,6,7,8
CWL = 9
CL = 13
CWL = 5,6,7,8
CWL = 9
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
t
CK(AVG)
Supported CL Settings
Supported CWL Settings
DDR3-1866M
min
13.91
(13.125)
5,14
13.91
(13.125)
5,14
13.91
(13.125)
5,14
13-13-13
max
20
—
—
34
9 * tREFI
47.91
(47.125)
5,14
-
Reserved
Reserved
2.5
3.3
Reserved
Reserved
Reserved
1.875
< 2.5
Reserved
Reserved
1.875
< 2.5
Reserved
Reserved
Reserved
1.5
<1.875
Reserved
Reserved
Reserved
1.5
<1.875
Reserved
Reserved
1.25
<1.5
Reserved
Reserved
Reserved
Reserved
1.07
<1.25
6, 7, 8, 9, 10, 11, 13
5, 6, 7, 8, 9
Rev. 1.0 / Apr. 2013
Unit
Note
ns
ns
ns
ns
ns
ns
1,2,3,4,9
ns
4
ns
1,2,3,9
ns
1,2,3,4,9
ns
4
ns
4
ns
1,2,3,4,9
ns
4
ns
4
ns
1,2,3,9
ns
1,2,3,4,9
ns
4
ns
4
ns
1,2,3,4,9
ns
1,2,3,4,9
ns
4
ns
4
ns
1,2,3,9
ns
1,2,3,4,9
ns
4
ns
1,2,3,4,9
ns
1,2,3,4
ns
4
ns
1,2,3,4
ns
4
ns
1, 2, 3
n
CK
n
CK
30
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