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EN6360QI

8A Synchronous Highly Integrated DC-DC PowerSoC

Enpirion, Inc. 

Application Information

Output Voltage Programming and loop

Compensation

The EN6360QI output voltage is programmed using

a simple resistor divider network. A phase lead

capacitor plus a resistor are required for stabilizing

the loop. Figure 6 shows the required components

and the equations to calculate their values.

The EN6360QI output voltage is determined by the

voltage presented at the VFB pin. This voltage is

set by way of a resistor divider between VOUT and

AGND with the midpoint going to VFB.

The EN6360QI uses a type IV compensation

network. Most of this network is integrated.

However, a phase lead capacitor and a resistor are

required in parallel with upper resistor of the

external feedback network (Refer to Figure 6). Total

compensation is optimized for use with two 47µF

output capacitance and will result in a wide loop

bandwidth and excellent load transient performance

for most applications. Additional capacitance may

be placed beyond the voltage sensing point outside

the control loop. Voltage mode operation provides

high noise immunity at light load. Furthermore,

voltage mode control provides superior impedance

matching to ICs processed in sub 90nm

technologies.

In some cases modifications to the compensation

or output capacitance may be required to optimize

device performance such as transient response,

ripple, or hold-up time. The EN6360QI provides the

capability to modify the control loop response to

allow for customization for such applications. For

more information, contact Enpirion Applications

Engineering support.

EN6360QI

Calculate the external feedback and compensation

network values with the equations below.

RA [Ω] = 48,400 x VIN [V]

*Round RA up to closest standard value

RB[Ω] = (VFB x RA) / (VOUT – VFB) [V]

VFB = 0.6V nominal

*Round RB to closest standard value

CA [F] = 3.83 x 10-6 / RA [Ω]

*Round CA down to closest standard value

R1 = 15kΩ

The feedback resistor network should be sensed at

the last output capacitor close to the device. Keep

the trace to VFB pin as short as possible.

Whenever possible, connect RB directly to the

AGND pin instead of going through the GND plane.

Input Capacitor Selection

The EN6360QI has been optimized for use with two

1206 22µF input capacitors. Low ESR ceramic

capacitors are required with X5R or X7R dielectric

formulation. Y5V or equivalent dielectric

formulations must not be used as these lose

capacitance with frequency, temperature and bias

voltage.

In some applications, lower value ceramic

capacitors may be needed in parallel with the larger

capacitors in order to provide high frequency

decoupling. The capacitors shown in the table

below are typical input capacitors. Other capacitors

with similar characteristics may also be used.

Table 3: Recommended Input Capacitors

Description

22µF, 10V, 20%

X5R, 1206

(2 capacitors needed)

MFG

Murata

Taiyo Yuden

P/N

GRM31CR61A226ME19L

LMK316BJ226ML-T

Figure 6: External Feedback/Compensation Network

The feedback and compensation network values

depend on the input voltage and output voltage.

Output Capacitor Selection

The EN6360QI has been optimized for use with two

1206 47µF output capacitors. Low ESR, X5R or

X7R ceramic capacitors are recommended as the

primary choice. Y5V or equivalent dielectric

formulations must not be used as these lose

capacitance with frequency, temperature and bias

voltage. The capacitors shown in the

Recommended Output Capacitors table are typical

output capacitors. Other capacitors with similar

characteristics may also be used. Additional bulk

©Enpirion 2011 all rights reserved, E&OE

06489

Enpirion Confidential

April 16, 2012

www.enpirion.com, Page 17

Rev: C

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