3.3 Input/Output Description
Table 3-3. SAMA5D4 I/O Type Description
I/O Type
GPIO
GPIO_CLK
GPIO_CLK2
GPIO_ANA
EBI
Voltage Range
3.0–3.6V
3.0–3.6V
3.0–3.6V
3.0–3.6V
1.65–1.95V, 3.0–3.6V
Analog
—
—
—
I
—
Pull-up
Type (2)
Typ Value (Ω)
Switchable
(1)
Switchable
(1)
Switchable
(1)
Switchable
(1)
Switchable
(1)
Pull-down
Type (2)
Typ Value (Ω)
Switchable
(1)
Switchable
(1)
Switchable
(1)
—
(1)
Switchable
(1)
Schmitt
Trigger (2)
Switchable
Switchable
Switchable
Switchable
—
RST
3.0–3.6V
—
Reset State
100K
Reset State
100K
Reset State
SYSC
1.65–3.6V
—
Reset State
100K
Reset State
15K
Reset State
USBHS
3.0–3.6V
I/O
—
—
—
—
—
CLOCK
1.65–3.6V
I/O
—
—
—
—
—
PIOBU
1.88–2.12V
—
Switchable
150K
Switchable
150K
Switchable
DIB
3.0–3.6V
I/O
—
(1)
—
(1)
—
Notes: 1. Refer to Section 55.2 “DC Characteristics”.
2. When “Reset State” is indicated, the configuration is defined by the “Reset State” column of the pin description tables (refer
to Table 3-1 and Table 3-2).
Table 3-4. SAMA5D4 I/O Type Assignment and Frequency
I/O Type
I/O Frequency (MHz) Load (pF) Fan-out Drive Control
Signal Name
GPIO
—
—
—
High/Medium/Low
All PIO lines except the lines indicated further
on in this table
MCI_CLK
—
—
—
High/Medium/Low MCI0CK, MCI1CK
GPIO_CLK
—
—
—
High/Medium/Low SPI0CK, SPI1CK, ETXCLK, ERXCLK
GPIO_CLK2
—
—
—
High/Medium/Low LCDPCK
GPIO_ANA
—
—
—
Fixed to Medium ADx
EBI
—
—
—
High/Medium/Low
1.8V/3.3V
All EBI signals
DDR_IO
—
—
—
High/Medium/Low All DDR signals
RST
—
—
—
Fixed to Low NRST, NTRST, RST
JTAG
—
—
—
Fixed to Medium TCK, TDI, TMS, TDO
SYSC
—
—
—
No
WKUP, SHDN, JTAGSEL, TST
VBG
—
—
—
No
VBG
USBHS
480
20
—
No
HHSDPC, HHSDPB, HHSDPA/DHSDP,
HHSDMC, HHSDMB, HHSDMA/DHSDM
CLOCK
50
50
—
No
XIN, XOUT, XIN32, XOUT32
PIOBU
—
—
—
No
PIOBUx
SAMA5D4 Series [DATASHEET]
27
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16