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ALC5624-GR 데이터 시트보기 (PDF) - Realtek Semiconductor

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ALC5624-GR
Realtek
Realtek Semiconductor Realtek
ALC5624-GR Datasheet PDF : 78 Pages
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Write WORD Protocol
Table 11. Write WORD Protocol
ALC5624
Datasheet
Read WORD Protocol
Table 12. Read WORD Protocol
1
7
11
S Device Address Wr A
8
Register Address
1
7
1
A S Device Address Rd A
8
1
Data Byte High A
8
11
Data Byte Low NA P
S: Start Condition
Slave Address: 7-bit Device Address
Wr: 0 for Write Command
Rd: 1 for Read Command
Command Code: 8-bit Register Address
A: 0 for ACK, 1 for NACK
Data Byte: 16-bit Mixer data
…: Master-to-Slave
…: Slave-to-Master
7.12. Odd-Addressed Register Access
The ALC5624 will return ‘0000h’ when odd-addressed and unimplemented registers are read.
7.13. Power Management
The ALC5624 supports a grouped power down control register (Reg26). More detailed Power
Management control is supported in Reg 3A, 3C, and 3E. Each particular block will only be active when
both Reg26 and Reg3A/3C/3E are set to ‘Enable’.
Hand-Held Multimedia I2S Audio Codec
23
Track ID: JATR-1076-21 Rev. 1.3

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