TDA8263HN 데이터 시트보기 (PDF) - Philips Electronics

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TDA8263HN

Fully integrated satellite tuner

Philips Electronics 

Philips Semiconductors

TDA8263HN

Fully integrated satellite tuner

Table 30: Synthesizer lock indicator; bit LOCK

LOCK Action

0

synthesizer is not locked

1

synthesizer is locked

Table 31: Auto calibration up threshold control; bit ACUP

ACUP Action

0

LC VCO tuning voltage is lower than VTH (see Table 24)

1

LC VCO tuning voltage is higher than VTH (see Table 24)

Table 32: Auto calibration down threshold control; bit ACDN

ACDN Action

0

LC VCO tuning voltage is higher than VTL (see Table 25)

1

LC VCO tuning voltage is lower than VTL (see Table 25)

Table 33: Calibration defect detection; bit ERRORCAL

ERRORCAL Action

0

no defect detected

1

calibration unit control tries to go lower than the minimum or higher than the

maximum Dword ratio

Table 34: RF input level indicator; bits INLEVEL[1:0]

This register gives the RF input level in dBm

INLEVEL1 INLEVEL0 Decimal RF power (dBm) [1]

0

0

0

< −30

0

1

1

−30 to −20

1

0

2

−20 to −15

1

1

3

> −15

[1] Typical values at nominal process and room temperature. Values are valid only when LNA path is selected

(bit RFATT = 0).

Table 35: Internal Dword register; bits DW[4:0]

This register gives the internal Dword value. This value could be the programmed D[4:0] value in

manual mode or the calculated value after LC VCO calibration in automatic mode.

DW[4:0]

Description

Binary value

The fLO to fVCO ratio is the same as shown in Table 11

9397 750 13193

Product data sheet

Rev. 01 — 14 December 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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