LT3796 데이터 시트보기 (PDF) - Linear Technology

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LT3796

100V Constant-Current and Constant-Voltage Controller with Dual Current Sense

Linear Technology 

LT3796

OPERATION

The LT3796 is a constant-frequency, current mode con-

troller with a low side NMOS gate driver. The operation of

the LT3796 is best understood by referring to the Block

Diagram. In normal operation, with the PWM pin low, the

GATE pin is driven to GND, the TG pin is pulled high to ISP

to turn off the PMOS disconnect switch, the VC pin goes

high impedance to store the previous switching state on

the external compensation capacitor, and the ISP and ISN

pin bias currents are reduced to leakage levels. When the

PWM pin transitions high, the TG pin transitions low after a

short delay. At the same time, the internal oscillator wakes

up and generates a pulse to set the PWM latch, turning on

the external power N-channel MOSFET switch (GATE goes

high). A voltage input proportional to the switch current,

sensed by an external current sense resistor between

the SENSE and GND input pins, is added to a stabilizing

slope compensation ramp and the resulting switch cur-

rent sense signal is fed into the negative terminal of the

PWM comparator. The current in the external inductor

increases steadily during the time the switch is on. When

the switch current sense voltage exceeds the output of the

error amplifier, labeled VC, the latch is reset and the switch

is turned off. During the switch off phase, the inductor

current decreases. At the completion of each oscillator

cycle, internal signals such as slope compensation return

to their starting points and a new cycle begins with the set

pulse from the oscillator. Through this repetitive action, the

PWM control algorithm establishes a switch duty cycle to

regulate a current or voltage in the load. The VC signal is

integrated over many switching cycles and is an amplified

version of the difference between the LED current sense

voltage, measured between ISP and ISN, and the target

difference voltage set by the CTRL pin. In this manner,

the error amplifier sets the correct peak switch current

level to keep the LED current in regulation. If the error

amplifier output increases, more current is demanded in

the switch; if it decreases, less current is demanded. The

switch current is monitored during the on phase and the

voltage across the SENSE pin is not allowed to exceed the

current limit threshold of 113mV (typical). If the SENSE pin

exceeds the current limit threshold, the SR latch is reset

regardless of the output state of the PWM comparator.

Likewise, any fault condition, i.e. FB1 overvoltage (VFB1 >

1.3V), LED over current, or INTVCC undervoltage (INTVCC

< 4V), the GATE pin is pulled down to GND immediately.

In voltage feedback mode, the operation is similar to that

described above, except the voltage at the VC pin is set

by the amplified difference of the internal reference of

1.25V (nominal) and the FB1 and FB2 pins. If FB1 and

FB2 are both lower than the reference voltage, the switch

current increases; if FB1 or FB2 is higher than the refer-

ence voltage, the switch demand current decreases. The

LED current sense feedback interacts with the voltage

feedback so that neither FB1 or FB2 exceeds the internal

reference and the voltage between ISP and ISN does not

exceed the threshold set by the CTRL pin. For accurate

current or voltage regulation, it is necessary to be sure

that under normal operating conditions, the appropriate

loop is dominant. To deactivate the voltage loop entirely,

FB1 and FB2 can be connected to GND. To deactivate the

LED current loop entirely, the ISP and ISN should be tied

together and the CTRL input tied to VREF.

Two LED specific functions featured on the LT3796 are

controlled by the voltage feedback FB1 pin. First, when

the FB1 pin exceeds a voltage 60mV lower (–5%) than

the FB1 regulation voltage and V(ISP-ISN) is less than

25mV (typical), the pull-down driver on the VMODE pin

is activated. This function provides a status indicator that

the load may be disconnected and the constant-voltage

feedback loop is taking control of the switching regulator.

When the FB1 pin exceeds the FB1 regulation voltage by

50mV (4% typical), the FAULT pin is activated.

LT3796 features a PMOS disconnect switch driver. The

PMOS disconnect switch can be used to improve the PWM

dimming ratio, and operate as fault protection as well.

Once a fault condition is detected, the TG pin is pulled high

to turnoff the PMOS switch. The action isolates the LED

array from the power path, preventing excessive current

from damaging the LEDs.

A standalone current sense amplifier is integrated in the

LT3796. It can work as input current limit or open LED

protection. The detailed information can be found in the

Application Information section.

3796f

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