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ALC202 데이터 시트보기 (PDF) - Realtek Semiconductor

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ALC202
Realtek
Realtek Semiconductor Realtek
ALC202 Datasheet PDF : 42 Pages
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ALC202/ALC202A
6.1.21 MX32 PCM ADC Rate
Default: BB80h
The ALC202 allows adjustment of the surround output sample rate. This register is used to adjust the sample rate. By changing
the values, sampling rates from 8000 to 48000 can be chosen.
Bit Type
15:0 R/W Output Sampling Rate: FISR[15:0]
Function
The ALC202 supports the following sampling rates, as required in the PC99/PC2001 design guide.
Sampling rate
FISR[15:0]
8000
1F40h
11025
2B11h
12000
2EE0
16000
3E80h
22050
5622h
24000
5DC0
32000
7D00h
44100
AC44h
48000
BB80h
Note that If the value written is not support, the closest value is returned.
When MX2A.0=0 (VRA is disable), this register will return BB80h when read.
6.1.22 MX3A S/PDIF Channel Status and Control
Default: 2000h
Bit Type
Function
15
14
13:12
11
10:4
3
2
1
0
R/W Validity Control: Control V bit in Sub-Frame.
1: The V bit in sub-frame is always send as 1 to indicate the invalid data is not
suitable for receiver.
0: The V bit (valid flag) in sub-frame depends on whether the S/PDIF data is under-run or over-run.
R Double Rate S/PDIF: (DRS)
The ALC202 does not support double rate S/PDIF. This bit is always 0.
R/W S/PDIF Sample Rate: SPSR[1:0]
00: Sample rate set to 44.1KHz, Fs[0:3]=0000
01: Reserved
10: Sample rate set to 48.0KHz, Fs[0:3]=0100 (default)
11: Sample rate set to 32.0KHz, Fs[0:3]=1100
R/W Generation Level (LEVEL)
R/W Category Code (CC[6:0])
R/W Preemphasis: (PRE)
1: Filter preemphasis is 50/15 µsec 0: None
R/W Copyright: (COPY)
1: Asserted 0: Not asserted
R/W Non-Audio Data Type: (/AUDIO)
1: AC3 or other digital non-audio data 0: PCM data
R Professional or Consumer Format: (PRO)
1: Professional format 0: Consumer format
The ALC202 supports consumer channel status format, so this bit is always 0.
2002/07/30
19
Rev.1.28

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