ALC202 데이터 시트보기 (PDF) - Realtek Semiconductor
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ALC202 Datasheet PDF : 42 Pages
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10. Application Circuit
ALC202/ALC202A
-RESET
BITCLK
SYNC
SDOUT
SDIN
EXT-14.318M
+3.3VDD
14.318MHz external clock
R2A
10K
C2A
R2C 0
0.01u
R2B
10K
+3.3VDD
24.576MHz
C1
+
C9
10u
0.1u
+5VA
+5VA
C25
0.1u
+ C38
10u
The recommended regulator must supply at least
output current to prevent from overheating.
C48
+
+10u
U2 LM7805CT
3 OUT
IN 1
+12V
C49
+ C47
+10u
0.1u
If 24.576MHz
crystal is used
C2
22P
Y1
C3
22P
R44 10
-RESET
SYNC
SDOUT
SDIN
Reserved
C28
22p
PCSPK
PHONE
AUX-L
AUX-R
VIDEO-L
VIDEO-R
CD-L
CD-R
MIC1
MIC2
LINE-L
LINE-R
C12 1u
C13 1u
C14 1u
C15 1u
C16 1u
C17 1u
C18 1u
C20 1u
C21 1u
C22 1u
C23 1u
C24 1u
U1
2
3
XTL-IN
XTL-OUT/XTLSEL#
LINEOUT-L
LINEOUT-R
MONO-OUT
35
36
37
11
6
10
5
RESET#
BITCLK
SYNC
8
SDOUT
SDIN
27
VREF
VREFOUT
28
29
AFILT1
AFILT2
30
12
13
PC-BEEP
14
15
16
PHONE
AUX-L
AUX-R
17
18
20
21
22
VIDEO-L
VIDEO-R
CD-L
CD-R
MIC1
23
24
MIC2
LINE-L
LINE-R
ALC202 / ALC202A
VRAD
VRDA
31
32
33
DCVOL
Vaux
GPIO0
34
43
44
GPIO1
ID0#
ID1#
EAPD/JD
SPDIFO
45
46
47
48
39
HPOUT-L
NC
HPOUT-R
40
41
C35
100uF
C36
100uF
LOUT-L
LOUT-R
C37 1u
Vrefout
Vrefout
C29 1n
C30 1n
DCVOL
+5Vaux
GPIO0
GPIO1
MONO-O
C27
4.7u / 10u
C31
C32
1u
1u
Select 14.318M clock, refer to T
JD
C39
100uF
SPDIFO
HP-OUT-L
R46
R45
C41
100uF HP-OUT-R
0
0
CDGND
ALC202: 60mW@8ohm amp at pin-39/41
R46=X, R45=X: Use 24.576MHz cryst
ALC202A: 60mW@8ohm amp at pin-35/36
R46=On, R45=X: Use 14.318MHz cloc
R46=On, R45=On: Use 14.318MHz clo
C19
1u
DGND
AGND
Tied at one point only under the codec
or near the codec
Filter Connection Schematic
Table-1. Clock Source
Y1 C2
C3
R2A R2B R2C C2A
R46
R45
Crystal
24.576M 22pF 22pF
X
X
X
X
X
X
ID=00
(Primary) Ext. 14.318M
X
X
X
10K
10K 0 0.01uF 0
X
Ext. 14.318M
X
X
X
X
X
0
0
0
X
R2A,R2B and C2A can bias external clock
to acceptible level if external clock is
weak.
Filter Connection Table
2002/07/30
38
Rev.1.28
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