NXP Semiconductors
74AHC30-Q100; 74AHCT30-Q100
8-input NAND gate
13. Abbreviations
Table 10. Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
Low-power Schottky Transistor-Transistor Logic
MIL
Military
MM
Machine Model
14. Revision history
Table 11. Revision history
Document ID
Release date
74AHC_AHCT30_Q100 v1. 20131120
Data sheet status
Product data sheet
Change notice
-
Supersedes
-
74AHC_AHCT30_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 November 2013
© NXP B.V. 2013. All rights reserved.
12 of 15