SAA5541PS 데이터 시트보기 (PDF) - Philips Electronics

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SAA5541PS

TV microcontrollers with Closed Captioning (CC) and On-Screen Display (OSD)

Philips Electronics 

Philips Semiconductors

TV microcontrollers with Closed Captioning (CC)

and On-Screen Display (OSD)

Preliminary specification

SAA55xx

BIT

FUNCTION

Pulse Width Modulator 6 Control Register (PWM6)

PW6E

PW6V5 to PW6V0

activate this PWM (logic 1)

pulse width modulator high time

Pulse Width Modulator 7 Control Register (PWM7)

PW7E

PW7V5 to PW7V0

activate this PWM (logic 1)

pulse width modulator high time

ROM Bank (ROMBK)

STBY

Standby mode enabled (logic 1)

I2C-bus Slave Address Register (S1ADR)

ADR6 to ADR0

I2C-bus slave address to which the device will respond

GC

enable I2C-bus general call address (logic 1)

I2C-bus Control Register (S1CON)

CR2 to CR0

ENSI

STA

STO

clock rate bits; CR<2:0>:

000 = 100 kHz bit rate

001 = 3.75 kHz bit rate

010 = 150 kHz bit rate

011 = 200 kHz bit rate

100 = 25 kHz bit rate

101 = 1.875 kHz bit rate

110 = 37.5 kHz bit rate

111 = 50 kHz bit rate

enable I2C-bus interface (logic 1)

START flag. When this bit is set in slave mode, the hardware checks the I2C-bus

and generates a START condition if the bus is free or after the bus becomes free.

If the device operates in master mode it will generate a repeated START

condition.

STOP flag. If this bit is set in a master mode a STOP condition is generated.

A STOP condition detected on the I2C-bus clears this bit. This bit may also be set

in slave mode in order to recover from an error condition. In this case no STOP

condition is generated to the I2C-bus, but the hardware releases the SDA and

SCL lines and switches to the not selected receiver mode. The STOP flag is

cleared by the hardware.

2000 Feb 23

20

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