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74VCX162835MTDX

Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs/Outputs and 26Ω Series Resistors in Outputs

Fairchild Semiconductor 

October 1998

Revised April 2000

74VCX162835

Low Voltage 18-Bit Universal Bus Driver with

3.6V Tolerant Inputs/Outputs

and 26Ω Series Resistors in Outputs

General Description

The VCX162835 low voltage 18-bit universal bus driver

combines D-type latches and D-type flip-flops to allow data

flow in transparent, latched and clocked modes.

Data flow is controlled by output-enable (OE), latch-enable

(LE), and clock (CLK) inputs. The device operates in

Transparent Mode when LE is held HIGH. The device

operates in clocked mode when LE is LOW and CLK is tog-

gled. Data transfers from the Inputs (In) to Outputs (On) on

a Positive Edge Transition of the Clock. When OE is LOW,

the output data is enabled. When OE is HIGH the output

port is in a high impedance state.

The VCX162835 is designed with 26Ω series resistors in

the outputs. This design reduces noise in applications such

as memory address drivers, clock drivers, and bus trans-

ceivers/transmitters.

The 74VCX162835 is designed for low voltage (1.65V to

3.6V) VCC applications with I/O capability up to 3.6V.

The 74VCX162835 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

Features

s Compatible with PC100 DIMM module specifications

s 1.65V–3.6V VCC specifications provided

s 3.6V tolerant inputs and outputs

s 26Ω series resistors in outputs

s tPD (CP to On)

4.2ns max for 3.0V to 3.6V VCC

5.2ns max for 2.3V to 2.7V VCC

9.2ns max for 1.65V to 1.95V VCC

s Power-down high impedance inputs and outputs

s Supports live insertion/withdrawal (Note 1)

s Static Drive (IOH/IOL)

±12mA @ 3.0V VCC

±8 mA @ 2.3V VCC

±3 mA @ 1.65V VCC

s Latchup performance exceeds 300 mA

s ESD performance:

Human body model > 2000V

Machine model >200V

Note 1: To ensure the high impedance state during power up or power

down, OE should be tied to VCC through a pulldown resistor; the minimum

value of the resistor is determined by the current sourcing capability of the

driver.

Ordering Code:

Order Number Package Number

Package Description

74VCX162835MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

© 2000 Fairchild Semiconductor Corporation DS500181

www.fairchildsemi.com

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