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LC75857E 데이터 시트보기 (PDF) - ON Semiconductor

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LC75857E Datasheet PDF : 39 Pages
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LC75857E, LC75857W
2. LC75857E/W internal block states during the reset period
• CLOCK GENERATOR
A reset is applied and either the OSC pin oscillator is stopped or external clock input is stopped.
• COMMON DRIVER, SEGMENT DRIVER & LATCH
Reset is applied and the display is turned off. However, display data can be input to the latch circuit in this state.
• KEY SCAN
Reset is applied, the circuit is set to the initial state, and at the same time the key scan operation is disabled.
• KEY BUFFER
Reset is applied and all the key data is set to low.
• CCB INTERFACE, CONTROL REGISTER, SHIFT REGISTER
Since serial data transfer is possible, these circuits are not reset.
VLCD
VLCD1
VLCD2
VSS
TEST
OSC
DO
DI
CL
CE
VDD
COMMON
DRIVER
CLOCK
GENERATOR
CCB
INTERFACE
VDET
SEGMENT DRIVER & LATCH
CONTROL
REGISTER
SHIFT REGISTER
KEY BUFFER
KEY SCAN
Blocks that are reset
No. 7980-27/39

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