MFRC52201HN1/TRAYBM_10 데이터 시트보기 (PDF) - NXP Semiconductors.

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MFRC52201HN1/TRAYBM_10

Contactless reader IC

NXP Semiconductors. 

NXP Semiconductors

MFRC522

Contactless reader IC

8.1.4.1 Data validity

Data on the SDA line must be stable during the HIGH clock period. The HIGH or LOW

state of the data line must only change when the clock signal on SCL is LOW.

SDA

SCL

data line

stable;

data valid

Fig 12. Bit transfer on the I2C-bus

change

of data

allowed

mbc 621

8.1.4.2 START and STOP conditions

To manage the data transfer on the I2C-bus, unique START (S) and STOP (P) conditions

are defined.

• A START condition is defined with a HIGH-to-LOW transition on the SDA line while

SCL is HIGH.

• A STOP condition is defined with a LOW-to-HIGH transition on the SDA line while

SCL is HIGH.

The I2C-bus master always generates the START and STOP conditions. The bus is busy

after the START condition. The bus is free again a certain time after the STOP condition.

The bus stays busy if a repeated START (Sr) is generated instead of a STOP condition.

The START (S) and repeated START (Sr) conditions are functionally identical. Therefore,

S is used as a generic term to represent both the START (S) and repeated START (Sr)

conditions.

SDA

SDA

SCL

S

START condition

Fig 13. START and STOP conditions

P

STOP condition

SCL

mbc 622

8.1.4.3 Byte format

Each byte must be followed by an acknowledge bit. Data is transferred with the MSB first;

see Figure 16. The number of transmitted bytes during one data transfer is unrestricted

but must meet the read/write cycle format.

MFRC522_34

Product data sheet

PUBLIC

All information provided in this document is subject to legal disclaimers.

Rev. 3.4 — 5 March 2010

112134

© NXP B.V. 2010. All rights reserved.

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