MFRC52201HN1/TRAYBM_10 데이터 시트보기 (PDF) - NXP Semiconductors.

부품명

상세내역

제조사

MFRC52201HN1/TRAYBM_10

Contactless reader IC

NXP Semiconductors. 

NXP Semiconductors

MFRC522

Contactless reader IC

9.3.1.8 Status1Reg register

Contains status bits of the CRC, interrupt and FIFO buffer.

Table 35. Status1Reg register (address 07h); reset value: 21h bit allocation

Bit

7

6

5

4

3

2

1

Symbol reserved CRCOk CRCReady IRq TRunning reserved HiAlert

Access

-

R

R

R

R

-

R

0

LoAlert

R

Table 36. Status1Reg register bit descriptions

Bit Symbol Value Description

7 reserved -

reserved for future use

6 CRCOk 1

the CRC result is zero

for data transmission and reception, the CRCOk bit is undefined: use the

ErrorReg register’s CRCErr bit

indicates the status of the CRC coprocessor, during calculation the value

changes to logic 0, when the calculation is done correctly the value

changes to logic 1

5 CRCReady 1

the CRC calculation has finished

only valid for the CRC coprocessor calculation using the CalcCRC

command

4 IRq

-

indicates if any interrupt source requests attention with respect to the

setting of the interrupt enable bits: see the ComIEnReg and DivIEnReg

registers

3 TRunning 1

MFRC522’s timer unit is running, i.e. the timer will decrement the

TCounterValReg register with the next timer clock

Remark: in gated mode, the TRunning bit is set to logic 1 when the

timer is enabled by TModeReg register’s TGated[1:0] bits; this bit is not

influenced by the gated signal

2 reserved -

reserved for future use

1 HiAlert

1

the number of bytes stored in the FIFO buffer corresponds to equation:

HiAlert = (64 – FIFOLength ) ≤ WaterLevel

example:

FIFO length = 60, WaterLevel = 4 → HiAlert = 1

FIFO length = 59, WaterLevel = 4 → HiAlert = 0

0 LoAlert

1

the number of bytes stored in the FIFO buffer corresponds to equation:

LoAlert = FIFOLength ≤ WaterLevel

example:

FIFO length = 4, WaterLevel = 4 → LoAlert = 1

FIFO length = 5, WaterLevel = 4 → LoAlert = 0

MFRC522_34

Product data sheet

PUBLIC

All information provided in this document is subject to legal disclaimers.

Rev. 3.4 — 5 March 2010

112134

© NXP B.V. 2010. All rights reserved.

40 of 96

Share Link: