MC1496P 데이터 시트보기 (PDF) - Motorola => Freescale
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MC1496P Datasheet PDF : 12 Pages
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MC1496, B
Figure 21. Suppression of Carrier Harmonic
Sidebands versus Carrier Frequency
0
10
20
3fC ± fS
30
40
2fC ± fS
50
2fC ± 2fS
60
70
0.05 0.1
0.5 1.0
5.0 10
50
fC, CARRIER FREQUENCY (MHz)
Figure 22. Carrier Suppression versus
Carrier Input Level
0
10
20
30
fC = 10 MHz
40
50
fC = 500 kHz
60
70
0
100
200
300
400
500
VC, CARRIER INPUT LEVEL (mVrms)
OPERATIONS INFORMATION
The MC1496, a monolithic balanced modulator circuit, is
shown in Figure 23.
This circuit consists of an upper quad differential amplifier
driven by a standard differential amplifier with dual current
sources. The output collectors are cross–coupled so that
full–wave balanced multiplication of the two input voltages
occurs. That is, the output signal is a constant times the
product of the two input signals.
Mathematical analysis of linear ac signal multiplication
indicates that the output spectrum will consist of only the sum
and difference of the two input frequencies. Thus, the device
may be used as a balanced modulator, doubly balanced mixer,
product detector, frequency doubler, and other applications
requiring these particular output signal characteristics.
The lower differential amplifier has its emitters connected
to the package pins so that an external emitter resistance
may be used. Also, external load resistors are employed at
the device output.
Signal Levels
The upper quad differential amplifier may be operated
either in a linear or a saturated mode. The lower differential
amplifier is operated in a linear mode for most applications.
For low–level operation at both input ports, the output
signal will contain sum and difference frequency components
and have an amplitude which is a function of the product of
the input signal amplitudes.
For high–level operation at the carrier input port and linear
operation at the modulating signal port, the output signal will
contain sum and difference frequency components of the
modulating signal frequency and the fundamental and odd
harmonics of the carrier frequency. The output amplitude will
be a constant times the modulating signal amplitude. Any
amplitude variations in the carrier signal will not appear in the
output.
The linear signal handling capabilities of a differential
amplifier are well defined. With no emitter degeneration, the
maximum input voltage for linear operation is approximately
25 mV peak. Since the upper differential amplifier has its
emitters internally connected, this voltage applies to the
carrier input port for all conditions.
Since the lower differential amplifier has provisions for an
external emitter resistance, its linear signal handling range
may be adjusted by the user. The maximum input voltage for
linear operation may be approximated from the following
expression:
V = (I5) (RE) volts peak.
This expression may be used to compute the minimum
value of RE for a given input voltage amplitude.
Figure 23. Circuit Schematic
(–) 12
Vo,
(+) 6 Output
10 (–)
Carrier
Input
VC
8
(+)
4 (–)
Signal
Input
VS 1
(+)
Bias 5
500 500
VEE 14
2
Gain
3 Adjust
(Pin numbers
500 per G package)
Figure 24. Typical Modulator Circuit
1.0 k
1.0 k
51
CarrierVC 0.1 µF
Input VS
Modulating
Signal 10 k 10 k
Input
50 k
0.1 µF
2
8
10
1
4
51 51
Re 1.0 k
MC1496
14
3
RL
3.9 k
6
12
5
I5 6.8 k
Carrier Null
–8.0 Vdc
VEE
12 Vdc
RL
3.9 k
+Vo
–Vo
MOTOROLA ANALOG IC DEVICE DATA
7
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