Product Specification
3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
LP121WX4
Liquid Crystal Display
Description
LVDS Differential Voltage
LVDS Common mode Voltage
LVDS Input Voltage Range
3-3-2. AC Specification
Symb
ol
Min
|VID|
100
VCM
0.6
VIN
0.3
Max
Unit
600
mV
1.8
V
2.1
V
Notes
-
-
-
Description
Symbol Min Max Unit
LVDS Clock to Data Skew Margin
tSKEW
tSKEW
- 400 + 400 ps
- 600 + 600 ps
LVDS Clock to Clock Skew Margin (Even
to Odd)
Maximum deviation
of input clock frequency during SSC
Maximum modulation frequency
of input clock during SSC
tSKEW_EO
FDEV
FMOD
- 1/7
-
-
+ 1/7 Tclk
±3 %
200 KHz
Notes
85MHz > Fclk ≥
65MHz
65MHz > Fclk ≥
25MHz
-
-
-
Ver. 0.0
Mar. 23, 2010
9 / 32