DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

KSZ9031RNX 데이터 시트보기 (PDF) - Microchip Technology

부품명
상세내역
제조사
KSZ9031RNX
Microchip
Microchip Technology Microchip
KSZ9031RNX Datasheet PDF : 78 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
KSZ9031RNX
TABLE 3-11:
NAND TREE TEST PIN ORDER FOR KSZ9031RNX (CONTINUED)
Pin
Description
GTX_CLK
TX_EN
RX_DV
RX_CLK
INT_/PME_N2
MDC
MDIO
CLK125_NDO
Input
Input
Input
Input
Input
Input
Input
Output
3.16 Power Management
The KSZ9031RNX incorporates a number of power-management modes and features that provide methods to consume
less energy. These are discussed in the following sections.
3.16.1 ENERGY-DETECT POWER-DOWN MODE
Energy-detect power-down (EDPD) mode is used to further reduce the transceiver power consumption when the cable
is unplugged. It is enabled by writing a one to MMD Address 1Ch, Register 23h, Bit [0], and is in effect when auto-nego-
tiation mode is enabled and the cable is disconnected (no link).
In EDPD Mode, the KSZ9031RNX shuts down all transceiver blocks, except for the transmitter and energy detect cir-
cuits. Power can be reduced further by extending the time interval between the transmissions of link pulses to check for
the presence of a link partner. The periodic transmission of link pulses is needed to ensure the KSZ9031RNX and its
link partner, when operating in the same low-power state and with Auto MDI/MDI-X disabled, can wake up when the
cable is connected between them. By default, EDPD mode is disabled after power-up.
3.16.2 SOFTWARE POWER-DOWN MODE
This mode is used to power down the KSZ9031RNX device when it is not in use after power-up. Software power-down
(SPD) mode is enabled by writing a one to Register 0h, Bit [11]. In the SPD state, the KSZ9031RNX disables all internal
functions, except for the MII management interface. The KSZ9031RNX exits the SPD state after a zero is written to Reg-
ister 0h, Bit [11].
3.16.3 CHIP POWER-DOWN MODE
This mode provides the lowest power state for the KSZ9031RNX device when it is mounted on the board but not in use.
Chip power-down (CPD) mode is enabled after power-up/reset with the MODE[3:0] strap-in pins set to ‘0111’. The
KSZ9031RNX exits CPD mode after a hardware reset is applied to the RESET_N pin (Pin 42) with the MODE[3:0] strap-
in pins set to an operating mode other than CPD.
3.17 Wake-On-LAN
Wake-On-LAN (WOL) is normally a MAC-based function to wake up a host system (for example, an Ethernet end
device, such as a PC) that is in standby power mode. Wake-up is triggered by receiving and detecting a special packet
(commonly referred to as the “magic packet”) that is sent by the remote link partner. The KSZ9031RNX can perform the
same WOL function if the MAC address of its associated MAC device is entered into the KSZ9031RNX PHY registers
for magic-packet detection. When the KSZ9031RNX detects the magic packet, it wakes up the host by driving its power
management event (PME) output pin low.
By default, the WOL function is disabled. It is enabled by setting the enabling bit and configuring the associated registers
for the selected PME wake-up detection method.
The KSZ9031RNX provides three methods to trigger a PME wake-up:
• Magic-packet detection
• Customized-packet detection
• Link status change detection
2016 Microchip Technology Inc.
DS00002117C-page 27

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]