74ABT841(2010) 데이터 시트보기 (PDF) - NXP Semiconductors.
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74ABT841 Datasheet PDF : 15 Pages
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NXP Semiconductors
74ABT841
10-bit bus interface latch; 3-state
Table 6. Static characteristics …continued
Symbol Parameter
Conditions
ICC
ΔICC
CI
CO
supply current
VCC = 5.5 V; VI = GND or VCC
outputs HIGH-state
outputs LOW-state
outputs disabled
additional supply current per input pin; VCC = 5.5 V; one
input at 3.4 V; other inputs at VCC
or GND
input capacitance
output capacitance
VI = 0 V or VCC
outputs disabled; VO = 0 V or VCC
25 °C
−40 °C to +85 °C Unit
Min Typ Max Min Max
- 0.5 250
-
- 25 38
-
- 0.5 250
-
[4] -
0.5 1.5
-
250 μA
38 mA
250 μA
1.5 mA
-
4
-
-
-
7
-
-
- pF
- pF
[1] For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
[2] This parameter is valid for any VCC between 0 V and 2.1 V with a transition time of up to 10 ms. For VCC = 2.1 V to VCC = 5 V ± 10 %, a
transition time of up to 100 μs is permitted.
[3] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[4] This is the increase in supply current for each input at 3.4 V.
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; for test circuit, see Figure 9.
Symbol Parameter
Conditions
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tsu(H)
tsu(L)
th(H)
th(L)
tWH
tWL
LOW to HIGH
Dn to Qn; see Figure 5
propagation delay LE to Qn; see Figure 6
HIGH to LOW
Dn to Qn; see Figure 5
propagation delay LE to Qn; see Figure 6
OFF-state to HIGH OE to Qn; see Figure 7
propagation delay
OFF-state to LOW OE to Qn; see Figure 7
propagation delay
HIGH to OFF-state OE to Qn; see Figure 7
propagation delay
LOW to OFF-state OE to Qn; see Figure 7
propagation delay
set-up time HIGH Dn to LE; see Figure 8
set-up time LOW Dn to LE; see Figure 8
hold time HIGH
Dn to LE; see Figure 8
hold time LOW
Dn to LE; see Figure 8
pulse width HIGH LE; see Figure 6
pulse width LOW LE; see Figure 6
25 °C; VCC = 5.0 V −40 °C to +70 °C; Unit
VCC = 5.0 V ± 0.5 V
Min Typ Max Min
Max
2.1 4.1 5.5 2.1
6.2 ns
2.1 4.1 5.9 2.1
6.5 ns
2.0 4.0 5.5 2.0
6.2 ns
2.8 4.6 6.2 2.8
6.7 ns
1.0 3.0 4.5 1.0
5.3 ns
2.2 4.1 5.6 2.2
6.3 ns
2.7 4.7 6.2 2.7
7.1 ns
2.8 4.6 6.1 2.8
6.5 ns
2.5 1.0 -
2.5
1.5 0 -
1.5
1.5 0.2 -
1.5
+1.0 −0.8 -
1.0
3.3 1.9 -
3.3
3.3 1.9 -
3.3
- ns
- ns
- ns
- ns
- ns
- ns
74ABT841_3
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 25 March 2010
© NXP B.V. 2010. All rights reserved.
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