LC66354C, 66356C, 66358C
Continued from preceding page.
Pin
P60/SI0
P61/SO1
P62/SCK1
P63/PIN1
I/O
Overview
I/O ports P60 to P63
• Input or output in 4-bit or 1-bit units
• P60 is also used as the serial input SI1
pin.
• P61 is also used as the serial output
I/O
SO1 pin.
• P62 is also used as the serial clock
SCK1 pin.
• P63 is also used for the event count
input to timer 1.
Output driver type
Options
• Pch: CMOS type
• Nch: Intermediate sink current
type
• Nch: +15-V handling when OD
option selected
CMOS or Nch OD
output
PC2/VREF0
PC3/VREF1
I/O ports PC2 and PC3
• Input or output in 2-bit or 1-bit units
• PC2 is also used as the VREF0
I/O
comparator comparison voltage pin.
• PC3 is also used as the VREF1
comparator comparison voltage pin.
• Pch: CMOS type
• Nch: Intermediate sink current
type
CMOS or Nch OD
output
State after a reset
H
H
PD0/CMP0
PD1/CMP1
PD2/CMP2
PD3/CMP3
PE0/TRA
PE1/TRB
OSC1
OSC2
Dedicated input ports PD0 to PD3
• These pins can be switched in software
to function as comparator inputs.
• The comparison voltage for PD0 is
I
provided by VREF0.
• The comparison voltage for PD1 to PD3
is provided by VREF1.
• Pins PD0 and PD1 can be set to the
comparator function individually, but pins
PD2 and PD3 are set together.
Dedicated input ports
I These pins can be switched in software to
function as three-value inputs.
System clock oscillator connections
I
When an external clock is used, leave
O OSC2 open and connect the clock signal
to OSC1.
RES
System reset input
I
When the P33/HOLD pin is at the high
level, a low level input to the RES pin will
initialize the CPU.
TEST
CPU test pin
I
This pin must be connected to VSS during
normal operation.
VDD
VSS
Power supply pins
Note: Pull-up MOS type: The output circuit includes a MOS transistor that pulls the pin up to VDD.
CMOS output: Complementary output.
OD output: Open-drain output.
Normal input
Normal input
Use of either a ceramic
oscillator or an external
clock can be selected.
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