MCU module description
UPSD3212A, UPSD3212C, UPSD3212CV
Table 16. List of all SFRs (continued)
Reg Name
7
Bit Register Name
6
5
4
3
2
1
0
Comments
EF
UDR0
UDR0.7
UDR0.6 UDR0.5 UDR0.4 UDR0.3 UDR0.2 UDR0.1 UDR0.0
00
USB Endpt0
Data Recv
F0
B
00 B Register
Table 17. PSD module register address offset
CSIOP
addr Register name
offset
7
6
Bit register name
5
4
3
2
1
0
Reset
value
Comments
00 Data In (Port A)
Reads Port pins as input
02
Control (Port A)
Configure pin between I/O or Address Out mode. Bit = 0 selects
I/O
00
04
Data Out (Port
A)
Latched data for output to Port pins, I/O Output mode
00
06
Direction (Port
A)
Configures Port pin as input or output. Bit = 0 selects input
00
08
Drive (Port A)
Configures Port pin between CMOS, Open Drain or Slew rate. Bit
= 0 selects CMOS
00
0A
Input Macrocell
(Port A)
Enable Out
0C
(Port A)
Reads latched value on Input Macrocells
Reads the status of the output enable control to the Port pin
driver. Bit = 0 indicates pin is in input mode.
01 Data In (Port B)
03 Control (Port B)
00
05
Data Out (Port
B)
00
07
Direction (Port
B)
00
09 Drive (Port B)
00
0B
Input Macrocell
(Port B)
Enable Out
0D
(Port B)
10 Data In (Port C)
12
Data Out (Port
C)
00
14
Direction (Port
C)
00
16 Drive (Port C)
00
18
Input Macrocell
(Port C)
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