ILC6381AP-33 데이터 시트보기 (PDF) - Fairchild Semiconductor
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ILC6381AP-33 Datasheet PDF : 8 Pages
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Pin Assignments
ILC6380/81
VSS
LX
5
4
SOT -89-5
(TOP VIEW)
1
2
3
N/C VOUT CE
ILC6380
VSS
EXT
5
4
SOT -89-5
(TOP VIEW)
1
2
3
N/C VOUT CE
ILC6381
Internal Block Diagram
LX
VSS
EXT
CE
VLX LIMITER
Slow Start
BUFFER
Vref
PWM/PFM Controlled
OSC
50/100/180KHz
Phase com
-
CHIP ENABLE
+
VDD
VDD is internally connected to the VOUT pin.
VOUT
Absolute Maximum Ratings (TA = 25°C)
Parameter
VOUT Input Voltage
Voltage on pin LX
Current on pin LX
Voltage on pin EXT
Current on pin EXT
CE Input Voltage
Continuous Total Power Dissipation
Operating Ambient Temperature
Storage Temperature
Symbol
VOUT
VLX
ILX
VEXT
IEXT
VCE
PD
TOPR
TSTG
Ratings
12
12
400
VSS-0.3~VOUT+0.3
±50
12
500
-30~+80
-40~+125
Units
V
V
mA
V
mA
V
mW
°C
°C
Electrical Characteristics
VOUT = 5.0V, FOSC = 100kHz TA - 25°C. Unless otherwise specified, VIN = VOUT x 0.6, IOUT = 50mA. See schematic, figure 3.
Parameter
Output Voltage
Input Voltage
Oscillation Startup
Voltage
Operation Startup
Voltage
No-Load Input Current
Supply Current 1
(Note 2)
Supply Current 2
Symbol
VOUT
VIN
VST
Conditions
LX = 10kΩ pull-up to 5V, VOUT = VST
Min.
4.875
Typ.
5.000
Max.
5.125
10
0.8
Units
V
V
V
VST1
IOUT = 1mA
0.9 V
IIN
IDD1
IOUT = 0mA (Note 1)
LX = 10kΩ pull-up to 5V, VOUT = 4.5V
23.0 46.0 µA
78.6 131.1 µA
IDD2
LX = 10kΩ pull-up to 5V, VOUT = 5.5V
6.9 13.8 µA
©2001 Fairchild Semiconductor Corporation
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