MB89610R 데이터 시트보기 (PDF) - Fujitsu

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MB89610R

8-bit Proprietary Microcontroller

Fujitsu 

MB89610R Series

s BLOCK DIAGRAM

X0

X1

RST

Oscillator

Clock controller

Reset circuit

(WDT)

P00/AD0

8

to P07/AD7

P10/A08

8

to P17/A15

MOD0

MOD1

P27/ALE

P26/RD

P25/WR

P24/CLK

P23/RDY

P22/HRQ

P21/HAK

P20/BUFC

CMOS I/O port

External bus

interface

CMOS output port

RAM

CPU

F2MC-8L

ROM

20-bit time-base timer

8-bit PWM timer

P37/PTO

8-bit pulse width

count timer

P36/WTO

P35/PWC

16-bit timer/counter

P34/EC

8-bit serial I/O 1

CMOS I/O port

P33/SI1

P32/SO1

P31/SCK1

P30

8-bit serial I/O 2

P47/SI2

P46/SO2

P45/SCK2

Buzzer output

N-ch open-drain I/O port

P44/BZ

4

P40 to P43

8

N-ch open-drain output port

P50 to P57

4

External interrupt

Input port

4 P60/INT0

to P63/INT3

P64

14

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