MB89610R 데이터 시트보기 (PDF) - Fujitsu

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MB89610R

8-bit Proprietary Microcontroller

Fujitsu 

MB89610R Series

(6) Bus Read Timing

Parameter

Symbol

(VCC = +5.0 V±10%, FC = 10 MHz, VSS = 0.0 V, TA = –40°C to +85°C)

Value

Pin

Condition

Unit Remarks

Min.

Max.

Valid address → RD ↓

time

tAVRL

RD, A15 to 08

AD7 to 0

1/4 tinst* – 64 ns

—

µs

RD pulse width

tRLRH

RD

1/2 tinst* – 20 ns

—

µs

Valid address → read

data time

tAVDV

AD7 to 0,

A15 to 08

—

1/2 tinst*

µs No wait

RD ↓ → read data time tRLDV

RD, AD7 to 0

—

1/2 tinst* – 80 ns µs No wait

RD ↑ → data hold time tRHDX

AD7 to 0, RD

0

—

ns

RD ↑ → ALE ↑ time tRHLH

RD, ALE

—

1/4 tinst* – 40 ns

—

µs

RD ↑ → address

invalid time

tRHAX

RD, A15 to 08

1/4 tinst* – 40 ns

—

µs

RD ↓ → CLK ↑ time

CLK ↓ → RD ↑ time

tRLCH

tCLRH

RD, CLK

1/4 tinst* – 40 ns

—

µs

0

—

ns

RD ↓ → BUFC ↓ time tRLBL

RD, BUFC

–5

—

µs

BUFC ↑ → valid

address time

tBHAV

A15 to 08,

AD7 to 0, BUFC

5

—

µs

* : For information on tinst, see “(4), Instruction Cycle.”

CLK

ALE

AD

A

RD

BUFC

2.4 V

0.8 V

tRHLH

0.8 V

2.4 V

0.8 V

2.4 V

0.8 V

tAVRL

tAVDV

0.7 VCC

0.3 VCC

tRLCH

tRLDV

tRLRH

0.8 V

tRLBL

0.7 VCC

0.3 VCC

tRHDX

2.4 V

tCLRH

0.8 V

tRHAX

2.4 V

0.8 V

2.4 V

0.8 V

2.4 V

0.8 V

tRHAV

2.4 V

27

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