PHT4NQ10LT 데이터 시트보기 (PDF) - NXP Semiconductors.
부품명
상세내역
제조사
PHT4NQ10LT Datasheet PDF : 13 Pages
| |||
PHT4NQ10LT
N-channel TrenchMOS logic level FET
Rev. 2 — 28 October 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications.
1.2 Features and benefits
Low conduction losses due to low
on-state resistance
Logic level compatible
1.3 Applications
DC-to-DC converters
General purpose switching
High-speed line drivers
1.4 Quick reference data
Table 1.
Symbol
VDS
ID
Quick reference data
Parameter
drain-source voltage
drain current
VGS
gate-source voltage
Static characteristics
RDSon
drain-source on-state
resistance
Conditions
Tj ≥ 25 °C; Tj ≤ 150 °C
Tsp = 25 °C; VGS = 5 V; see Figure 1;
see Figure 2
VGS = 5 V; ID = 1.75 A; Tj = 25 °C;
see Figure 10; see Figure 11
2. Pinning information
Min Typ Max Unit
-
-
100 V
-
-
3.5 A
-16 -
16 V
-
200 250 mΩ
Table 2.
Pin
1
2
3
4
Pinning information
Symbol Description
G
gate
D
drain
S
source
D
drain
Simplified outline
4
123
SOT223 (SC-73)
Graphic symbol
D
G
mbb076 S
Share Link: 