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PHT4NQ10LT 데이터 시트보기 (PDF) - NXP Semiconductors.

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PHT4NQ10LT
NXP
NXP Semiconductors. NXP
PHT4NQ10LT Datasheet PDF : 13 Pages
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NXP Semiconductors
PHT4NQ10LT
N-channel TrenchMOS logic level FET
3. Ordering information
Table 3. Ordering information
Type number
Package
Name
PHT4NQ10LT
SC-73
4. Marking
Description
plastic surface-mounted package with increased heatsink;
4 leads
Version
SOT223
Table 4. Marking codes
Type number
PHT4NQ10LT
5. Limiting values
Marking code
4NQ10L
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
ID
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
IDM
peak drain current
Conditions
Tj 25 °C; Tj 150 °C
Tj 25 °C; Tj 150 °C; RGS = 20 k
Tsp = 100 °C; VGS = 5 V
Tsp = 25 °C; VGS = 5 V; see Figure 1;
see Figure 2
Tsp = 25 °C; pulsed; tp 10 µs;
see Figure 1
Ptot
total power dissipation
Tstg
storage temperature
Tj
junction temperature
Source-drain diode
Tsp = 25 °C; see Figure 3
IS
source current
ISM
peak source current
Avalanche ruggedness
Tsp = 25 °C
Tsp = 25 °C; pulsed; tp 10 µs
EDS(AL)S
IAS
non-repetitive drain-source
avalanche energy
non-repetitive avalanche
current
VGS = 5 V; Tj = 25 °C; ID = 3.5 A;
RGS = 50 ; Vsup 15 V; unclamped;
tp = 0.2 ms; see Figure 4
Vsup 15 V; VGS = 5 V; Tj(init) = 25 °C;
RGS = 50 ; unclamped; see Figure 4
Min Max Unit
-
100 V
-
100 V
-16 16 V
-
2.2 A
-
3.5 A
-
14 A
-
6.9 W
-65 150 °C
-65 150 °C
-
3.5 A
-
14 A
-
45 mJ
-
3.5 A
PHT4NQ10LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 28 October 2011
© NXP B.V. 2011. All rights reserved.
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