MAX4800ACCM(2011) 데이터 시트보기 (PDF) - Maxim Integrated
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MAX4800ACCM
(Rev.:2011)
(Rev.:2011)
Maxim Integrated
MAX4800ACCM Datasheet PDF : 15 Pages
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Low-Charge-Injection, 8-Channel, High-Voltage
Analog Switches with 20MHz Serial Interface
TIMING CHARACTERISTICS
(VDD = +2.7V to +6V, VPP = +40V to (VNN + 200V), VNN = -40V to -160V, TA = TMIN to TMAX, unless otherwise noted. Typical values
are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
ANALOG SWITCH
Turn-On Time
tON
VNO_ = VPP - 10V, RL = 10kΩ, VNN = -40V
to -160V
5
µs
Turn-Off Time
tOFF
VNO_ = VPP - 10V, RL = 10kΩ, VNN = -40V
to -160V
5
µs
Output Switching Frequency
Maximum VCOM_, VNO_ Slew
Rate
fSW
dV/dt
Duty cycle = 50%
(Note 4)
50
kHz
20
V/ns
LOGIC TIMING (Figure 1)
CLK Frequency
fCLK Daisy chaining
VDD = +5V ±10%
VDD = +3V ±10%
DIN to CLK Setup Time
tDS
VDD = +5V ±10%
VDD = +3V ±10%
DIN to CLK Hold Time
tDH
VDD = +5V ±10%
3
VDD = +3V ±10%
3
CLK to LE Setup Time
tCS
VDD = +5V ±10%
36
VDD = +3V ±10%
65
LE Low Pulse Width
tWL
VDD = +5V ±10%
VDD = +3V ±10%
14
22
CLR High Pulse Width
tWC
VDD = +5V ±10%
VDD = +3V ±10%
20
40
CLK Rise and Fall Times (Note 4)
tR, tF
VDD = +5V ±10%
VDD = +3V ±10%
CLK to DOUT Delay
tDO
VDD = +5V ±10%, CL ≤ 20pF
VDD = +3V ±10%, CL ≤ 20pF
6
12
20
MHz
10
10
ns
16
ns
ns
ns
ns
50
ns
50
42
ns
80
Note 2: Specifications at 0°C are guaranteed by correlation and design.
Note 3: The analog-signal input VCOM_ and VNO_ must satisfy VNN ≤ (VCOM_, VNO_) ≤ VPP, or remain unconnected during power-up
and power-down.
Note 4: Guaranteed by design and characterization; not production tested.
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