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74LVC1G18GW 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74LVC1G18GW
NEXPERIA
Nexperia B.V. All rights reserved NEXPERIA
74LVC1G18GW Datasheet PDF : 14 Pages
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Nexperia
74LVC1G18
1-of-2 non-inverting demultiplexer with 3-state deselected output
14. Abbreviations
Table 11. Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
15. Revision history
Table 12. Revision history
Document ID
Release date
Data sheet status
Change notice Supersedes
74LVC1G18 v.3
Modifications:
20161202
Product data sheet
-
74LVC1G18 v.2
Table 7: The maximum limits for leakage current and supply current have changed.
74LVC1G18 v.2
Modifications:
<tbd>
Product data sheet
-
The format of this data sheet has been redesigned to comply with the
new identity guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where
appropriate.
In Section 10 “Static characteristics”, changed conditions for input
leakage and supply current.
74LVC1G18 v.1
74LVC1G18 v.1
20030725
Product specification
-
-
74LVC1G18
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 2 December 2016
© Nexperia B.V. 2017. All rights reserved
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