74LVC1G38GW-Q100 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74LVC1G38GW-Q100

2-input NAND gate; open drain

Nexperia B.V. All rights reserved 

Nexperia

74LVC1G38-Q100

2-input NAND gate; open drain

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

74LVC1G38GW-Q100 40 C to +125 C TSSOP5

74LVC1G38GV-Q100 40 C to +125 C SC-74A

Description

plastic thin shrink small outline package; 5 leads;

body width 1.25 mm

plastic surface-mounted package; 5 leads

Version

SOT353-1

SOT753

4. Marking

Table 2. Marking

Type number

74LVC1G38GW-Q100

74LVC1G38GV-Q100

Marking code[1]

YB

YB

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

$

%

<

DDE

Fig 1. Logic symbol







DDE

Fig 2. IEC logic symbol

6. Pinning information

6.1 Pinning

/9&*4

$

 9&&

%

*1' 

<

DDD

Fig 4. Pin configuration for SOT353-1 and SOT753

<

$

%

*1'

DDE

Fig 3. Logic diagram

74LVC1G38_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 9 December 2016

© Nexperia B.V. 2017. All rights reserved

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