LH28F400SU-LC 데이터 시트보기 (PDF) - Sharp Electronics

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LH28F400SU-LC

4M (512K × 8, 256K × 16) Flash Memory

Sharp Electronics 

4M (512K × 8, 256K × 16) Flash Memory

LH28F400SU-LC

START

WRITE A7H

WRITE D0H

READ COMPATIBLE

STATUS REGISTER

SUSPEND

NO ERASE LOOP

CSR.7 = 0

SUSPEND YES

ERASE

1

CSR FULL STATUS

CHECK IF DESIRED

OPERATION

COMPLETE

BUS

OPERATION

COMMAND

COMMENTS

Write

Erase All

Unlocked

Blocks

D = A7H

A=X

Write

Read

Confirm

D = D0H

A=X

Q = CSRD

Toggle CE or OE

to update CSRD

A=X

Standby

Check CSR.7

1 = WSM Ready

0 = WSM Busy

CSR Full Status Check can be done after Erase All Unlocked

Block, or after a sequence of Erasures.

Write FFH after the last operation to reset

device to read array mode.

See Command Bus Cycle notes for description of codes.

CSR FULL STATUS CHECK PROCEDURE

READ CSRD

(see above)

CSR.4, 5 = 0

1

ERASE

SUCCESSFUL

CSR.3 = 1

VPP LOW

DETECT

BUS

OPERATION

COMMAND

COMMENTS

Standby

Check CSR.4, 5

1 = Erase Error

0 = Erase Successful

Both 1 = Command

Sequence Error

Standby

Check CSR.3

1 = VPP Low Detect

0 = VPP OK

CSR.3, 4, 5 should be cleared, if set, before further attempts

are initiated.

0

CLEAR CSRD

RETRY/ERROR

RECOVERY

Figure 13. Erase All Unlocked Blocks with Compatible Status Registers

28F400SUH-LC15-11

17

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