74HCT164-Q100(2013) 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved
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74HCT164-Q100
(Rev.:2013)
(Rev.:2013)
Nexperia B.V. All rights reserved
74HCT164-Q100 Datasheet PDF : 18 Pages
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Nexperia
74HC164-Q100; 74HCT164-Q100
8-bit serial-in, parallel-out shift register
5.2 Pin description
Table 2. Pin description
Symbol
Pin
DSA
1
DSB
2
Q0 to Q7
3, 4, 5, 6, 10, 11, 12, 13
GND
7
CP
8
MR
9
VCC
14
6. Functional description
Description
data input
data input
output
ground (0 V)
clock input (LOW-to-HIGH, edge-triggered)
master reset input (active LOW)
positive supply voltage
Table 3. Function table[1]
Operating
Input
modes
MR
CP
Reset (clear)
L
X
Shift
H
H
H
H
DSA
X
l
l
h
h
DSB
X
l
h
l
h
Output
Q0
L
L
L
L
H
Q1 to Q7
L to L
q0 to q6
q0 to q6
q0 to q6
q0 to q6
[1] H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition
q = lower case letters indicate the state of the referenced input one set-up time prior to the LOW-to-HIGH clock transition
= LOW-to-HIGH clock transition
74HC_HCT164_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 August 2013
© Nexperia B.V. 2017. All rights reserved
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