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74LVC16244A-Q100 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74LVC16244A-Q100
NEXPERIA
Nexperia B.V. All rights reserved NEXPERIA
74LVC16244A-Q100 Datasheet PDF : 13 Pages
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74LVC16244A-Q100;
74LVCH16244A-Q100
16-bit buffer/line driver; 5 V input/output tolerant; 3-state
Rev. 5 — 15 February 2019
Product data sheet
1. General description
The 74LVC16244A-Q100; 74LVCH16244A-Q100 are 16-bit non-inverting buffer/line drivers with
3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or
one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each controlling four of the
3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to
the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.
The 74LVCH16244A-Q100 bus hold on data inputs eliminates the need for external pull-up
resistors to hold unused inputs.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Multibyte flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
High-impedance when VCC = 0 V
All data inputs have bus hold. (74LVCH16244A-Q100 only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
CDM ANSI/ESDA/Jedec JS-002 exceeds 1000 V

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