74HCT4017-Q100 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved
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74HCT4017-Q100 Datasheet PDF : 22 Pages
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Nexperia
74HC4017-Q100; 74HCT4017-Q100
Johnson decade counter with 10 decoded outputs
&3 05
+&4
+&74
&3
4 4 4 4
&3 05
+&4
+&74
&3
4 4 4 4
&3 05
+&4
+&74
&3
4 4 4
GHFRGHG
RXWSXWV
GHFRGHG
RXWSXWV
GHFRGHG
RXWSXWV
FORFN
ILUVWVWDJH
Fig 12. Counter expansion
LQWHUPHGLDWHVWDJHV
ODVWVWDJH
DDD
Remark: Do not enable the counter on CP1 when CP0 is HIGH, or on CP0 when CP1 is
LOW. It causes an extra count.
Figure 13 shows an example of a divide-by 2 through divide-by 10 circuit using one
74HC4017-Q100; 74HCT4017-Q100. Since the 74HC4017-Q100; 74HCT4017-Q100 has
an asynchronous reset, the output pulse widths are narrow (minimum expected pulse
width is 6 ns). The output pulse widths can be enlarged by inserting an RC network at the
MR input.
GLYLGHE\
GLYLGHE\
GLYLGHE\
GLYLGHE\
GLYLGHE\
+&4
+&74
4
4
4
4
4
4
4
*1'
9&&
05
&3
&3
4
4
4
4
9&&
ILQ
GLYLGHE\
GLYLGHE\
GLYLGHE\
GLYLGHE\
Fig 13. Divide-by 2 through divide-by 10
IRXW
DDD
74HC_HCT4017_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 24 March 2014
© Nexperia B.V. 2017. All rights reserved
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