1.1 Features
• Central Processing Unit (CPU32)
— 32-Bit Architecture
— Virtual Memory Implementation
— Table Lookup and Interpolate Instruction
— Improved Exception Handling for Controller Applications
— High-Level Language Support
— Background Debugging Mode
— Fully Static Operation
• System Integration Module (SIM)
— External Bus Support
— Programmable Chip-Select Outputs
— System Protection Logic
— Watchdog Timer, Clock Monitor, and Bus Monitor
— Two 8-Bit Dual Function Input/Output Ports
— One 7-Bit Dual Function Output Port
— Phase-Locked Loop (PLL) Clock System
• 8/10-Bit Analog-to-Digital Converter (ADC)
— Seven Analog/Digital Input Pins (Eighth Channel Connected to VSSA)
— Eight Result Registers
— Eight Conversion Modes
— Three Result Alignment Modes
— One 7-Bit Digital Input Port
• Time Processor Unit (TPU)
— Dedicated Microengine Operating Independently of CPU32
— 16 Independent, Programmable Channels and Pins
— Any Channel can Perform any Microcoded Time Function
— Two Timer Count Registers with Programmable Prescalers
— Selectable Channel Priority Levels
• 1-Kbyte Standby RAM with TPU Emulation (TPURAM)
— External Standby Voltage Supply Input
— Can be Used as Standby RAM or TPU Microcode Emulation RAM
1.2 Block Diagram
MC68334
MC68334TS/D
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