PMK30EP
P-channel TrenchMOS extremely low level FET
Rev. 04 — 25 October 2010
Product data sheet
1. Product profile
1.1 General description
Extremely low level P-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Low conduction losses due to low
on-state resistance
1.3 Applications
Battery management
Load switching
1.4 Quick reference data
Table 1.
Symbol
VDS
ID
Quick reference data
Parameter
drain-source voltage
drain current
Ptot
total power dissipation
Static characteristics
RDSon
drain-source on-state
resistance
Dynamic characteristics
QGD
gate-drain charge
Conditions
25 °C ≤ Tj ≤ 150 °C
Tsp = 25 °C; VGS = -10 V;
see Figure 1; see Figure 3
Tsp = 25 °C; see Figure 2
VGS = -10 V; ID = -9.2 A;
Tj = 25 °C; see Figure 9
VGS = -10 V; ID = -9.2 A;
VDS = -15 V; Tj = 25 °C;
see Figure 11; see Figure 12
Min Typ Max Unit
-
-
-30 V
-
-
-14. A
9
-
-
6.9 W
-
16 19 mΩ
-
7-
nC